target/mips: Merge msa32/msa64 decodetree definitions
We don't need to maintain 2 sets of decodetree definitions. Merge them into a single file. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210617174636.2902654-3-f4bug@amsat.org>
This commit is contained in:
parent
525ea877b2
commit
f5c6ee0c6b
@ -1,8 +1,7 @@
|
||||
gen = [
|
||||
decodetree.process('mips32r6.decode', extra_args: '--static-decode=decode_mips32r6'),
|
||||
decodetree.process('mips64r6.decode', extra_args: '--static-decode=decode_mips64r6'),
|
||||
decodetree.process('msa32.decode', extra_args: '--static-decode=decode_msa32'),
|
||||
decodetree.process('msa64.decode', extra_args: '--static-decode=decode_msa64'),
|
||||
decodetree.process('msa.decode', extra_args: '--decode=decode_ase_msa'),
|
||||
decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'),
|
||||
]
|
||||
|
||||
|
@ -6,9 +6,10 @@
|
||||
#
|
||||
# Reference:
|
||||
# MIPS Architecture for Programmers Volume IV-j
|
||||
# The MIPS32 SIMD Architecture Module, Revision 1.12
|
||||
# (Document Number: MD00866-2B-MSA32-AFP-01.12)
|
||||
#
|
||||
# - The MIPS32 SIMD Architecture Module, Revision 1.12
|
||||
# (Document Number: MD00866-2B-MSA32-AFP-01.12)
|
||||
# - The MIPS64 SIMD Architecture Module, Revision 1.12
|
||||
# (Document Number: MD00868-1D-MSA64-AFP-01.12)
|
||||
|
||||
&rtype rs rt rd sa
|
||||
|
||||
@ -19,6 +20,7 @@
|
||||
@bz_df ...... ... df:2 wt:5 s16:16 &msa_bz
|
||||
|
||||
LSA 000000 ..... ..... ..... 000 .. 000101 @lsa
|
||||
DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa
|
||||
|
||||
BZ_V 010001 01011 ..... ................ @bz
|
||||
BNZ_V 010001 01111 ..... ................ @bz
|
@ -1,17 +0,0 @@
|
||||
# MIPS SIMD Architecture Module instruction set
|
||||
#
|
||||
# Copyright (C) 2020 Philippe Mathieu-Daudé
|
||||
#
|
||||
# SPDX-License-Identifier: LGPL-2.1-or-later
|
||||
#
|
||||
# Reference:
|
||||
# MIPS Architecture for Programmers Volume IV-j
|
||||
# The MIPS64 SIMD Architecture Module, Revision 1.12
|
||||
# (Document Number: MD00868-1D-MSA64-AFP-01.12)
|
||||
#
|
||||
|
||||
&rtype rs rt rd sa !extern
|
||||
|
||||
@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype
|
||||
|
||||
DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa
|
@ -18,8 +18,7 @@
|
||||
#include "internal.h"
|
||||
|
||||
/* Include the auto-generated decoder. */
|
||||
#include "decode-msa32.c.inc"
|
||||
#include "decode-msa64.c.inc"
|
||||
#include "decode-msa.c.inc"
|
||||
|
||||
#define OPC_MSA (0x1E << 26)
|
||||
|
||||
@ -2269,13 +2268,8 @@ static bool trans_LSA(DisasContext *ctx, arg_rtype *a)
|
||||
|
||||
static bool trans_DLSA(DisasContext *ctx, arg_rtype *a)
|
||||
{
|
||||
if (TARGET_LONG_BITS != 64) {
|
||||
return false;
|
||||
}
|
||||
return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa);
|
||||
}
|
||||
|
||||
bool decode_ase_msa(DisasContext *ctx, uint32_t insn)
|
||||
{
|
||||
if (TARGET_LONG_BITS == 64 && decode_msa64(ctx, insn)) {
|
||||
return true;
|
||||
}
|
||||
return decode_msa32(ctx, insn);
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user