qemu/target
Richard Henderson e2cce18f5c target/arm: Add VHE system register redirection and aliasing
Several of the EL1/0 registers are redirected to the EL2 version when in
EL2 and HCR_EL2.E2H is set.  Many of these registers have side effects.
Link together the two ARMCPRegInfo structures after they have been
properly instantiated.  Install common dispatch routines to all of the
relevant registers.

The same set of registers that are redirected also have additional
EL12/EL02 aliases created to access the original register that was
redirected.

Omit the generic timer registers from redirection here, because we'll
need multiple kinds of redirection from both EL0 and EL2.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200206105448.4726-29-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-02-07 14:04:25 +00:00
..
alpha tcg: Search includes from the project root source directory 2020-01-15 15:13:10 -10:00
arm target/arm: Add VHE system register redirection and aliasing 2020-02-07 14:04:25 +00:00
cris cpu: Use cpu_class_set_parent_reset() 2020-01-24 20:59:06 +01:00
hppa target/hppa: Allow, but diagnose, LDCW aligned only mod 4 2020-01-27 10:49:51 -08:00
i386 target/i386: Add the 'model-id' for Skylake -v3 CPU models 2020-01-24 20:59:17 +01:00
lm32 cpu: Use cpu_class_set_parent_reset() 2020-01-24 20:59:06 +01:00
m68k cpu: Use cpu_class_set_parent_reset() 2020-01-24 20:59:06 +01:00
microblaze qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
mips target/mips: Separate FPU-related helpers into their own file 2020-02-04 08:53:54 +01:00
moxie cpu: Use cpu_class_set_parent_reset() 2020-01-24 20:59:06 +01:00
nios2 qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
openrisc cpu: Use cpu_class_set_parent_reset() 2020-01-24 20:59:06 +01:00
ppc target/ppc: Use probe_write for DCBZ 2020-02-03 11:33:11 +11:00
riscv * Register qdev properties as class properties (Marc-André) 2020-01-27 09:44:04 +00:00
s390x s390x: sigp: Fix sense running reporting 2020-01-27 12:13:10 +01:00
sh4 cpu: Use cpu_class_set_parent_reset() 2020-01-24 20:59:06 +01:00
sparc qdev: set properties with device_class_set_props() 2020-01-24 20:59:15 +01:00
tilegx cpu: Use cpu_class_set_parent_reset() 2020-01-24 20:59:06 +01:00
tricore cpu: Use cpu_class_set_parent_reset() 2020-01-24 20:59:06 +01:00
unicore32 tcg: Search includes from the project root source directory 2020-01-15 15:13:10 -10:00
xtensa cpu: Use cpu_class_set_parent_reset() 2020-01-24 20:59:06 +01:00