cpu: Use cpu_class_set_parent_reset()

Convert all targets to use cpu_class_set_parent_reset() with the following
coccinelle script:

@@
type CPUParentClass;
CPUParentClass *pcc;
CPUClass *cc;
identifier parent_fn;
identifier child_fn;
@@
+cpu_class_set_parent_reset(cc, child_fn, &pcc->parent_fn);
-pcc->parent_fn = cc->reset;
...
-cc->reset = child_fn;

Signed-off-by: Greg Kurz <groug@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Acked-by: David Hildenbrand <david@redhat.com>
Message-Id: <157650847817.354886.7047137349018460524.stgit@bahia.lan>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Greg Kurz 2019-12-16 16:01:18 +01:00 committed by Paolo Bonzini
parent ef0a6249a8
commit bc9888f759
18 changed files with 18 additions and 36 deletions

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@ -2707,8 +2707,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
&acc->parent_realize);
dc->props = arm_cpu_properties;
acc->parent_reset = cc->reset;
cc->reset = arm_cpu_reset;
cpu_class_set_parent_reset(cc, arm_cpu_reset, &acc->parent_reset);
cc->class_by_name = arm_cpu_class_by_name;
cc->has_work = arm_cpu_has_work;

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@ -264,8 +264,7 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, cris_cpu_realizefn,
&ccc->parent_realize);
ccc->parent_reset = cc->reset;
cc->reset = cris_cpu_reset;
cpu_class_set_parent_reset(cc, cris_cpu_reset, &ccc->parent_reset);
cc->class_by_name = cris_cpu_class_by_name;
cc->has_work = cris_cpu_has_work;

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@ -7149,8 +7149,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
&xcc->parent_unrealize);
dc->props = x86_cpu_properties;
xcc->parent_reset = cc->reset;
cc->reset = x86_cpu_reset;
cpu_class_set_parent_reset(cc, x86_cpu_reset, &xcc->parent_reset);
cc->reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP;
cc->class_by_name = x86_cpu_class_by_name;

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@ -218,8 +218,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, lm32_cpu_realizefn,
&lcc->parent_realize);
lcc->parent_reset = cc->reset;
cc->reset = lm32_cpu_reset;
cpu_class_set_parent_reset(cc, lm32_cpu_reset, &lcc->parent_reset);
cc->class_by_name = lm32_cpu_class_by_name;
cc->has_work = lm32_cpu_has_work;

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@ -273,8 +273,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
device_class_set_parent_realize(dc, m68k_cpu_realizefn,
&mcc->parent_realize);
mcc->parent_reset = cc->reset;
cc->reset = m68k_cpu_reset;
cpu_class_set_parent_reset(cc, m68k_cpu_reset, &mcc->parent_reset);
cc->class_by_name = m68k_cpu_class_by_name;
cc->has_work = m68k_cpu_has_work;

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@ -292,8 +292,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, mb_cpu_realizefn,
&mcc->parent_realize);
mcc->parent_reset = cc->reset;
cc->reset = mb_cpu_reset;
cpu_class_set_parent_reset(cc, mb_cpu_reset, &mcc->parent_reset);
cc->class_by_name = mb_cpu_class_by_name;
cc->has_work = mb_cpu_has_work;

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@ -189,8 +189,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
device_class_set_parent_realize(dc, mips_cpu_realizefn,
&mcc->parent_realize);
mcc->parent_reset = cc->reset;
cc->reset = mips_cpu_reset;
cpu_class_set_parent_reset(cc, mips_cpu_reset, &mcc->parent_reset);
cc->class_by_name = mips_cpu_class_by_name;
cc->has_work = mips_cpu_has_work;

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@ -101,8 +101,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, moxie_cpu_realizefn,
&mcc->parent_realize);
mcc->parent_reset = cc->reset;
cc->reset = moxie_cpu_reset;
cpu_class_set_parent_reset(cc, moxie_cpu_reset, &mcc->parent_reset);
cc->class_by_name = moxie_cpu_class_by_name;

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@ -188,8 +188,7 @@ static void nios2_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, nios2_cpu_realizefn,
&ncc->parent_realize);
dc->props = nios2_properties;
ncc->parent_reset = cc->reset;
cc->reset = nios2_cpu_reset;
cpu_class_set_parent_reset(cc, nios2_cpu_reset, &ncc->parent_reset);
cc->class_by_name = nios2_cpu_class_by_name;
cc->has_work = nios2_cpu_has_work;

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@ -150,8 +150,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, openrisc_cpu_realizefn,
&occ->parent_realize);
occ->parent_reset = cc->reset;
cc->reset = openrisc_cpu_reset;
cpu_class_set_parent_reset(cc, openrisc_cpu_reset, &occ->parent_reset);
cc->class_by_name = openrisc_cpu_class_by_name;
cc->has_work = openrisc_cpu_has_work;

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@ -10873,8 +10873,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
pcc->interrupts_big_endian = ppc_cpu_interrupts_big_endian_always;
dc->props = ppc_cpu_properties;
pcc->parent_reset = cc->reset;
cc->reset = ppc_cpu_reset;
cpu_class_set_parent_reset(cc, ppc_cpu_reset, &pcc->parent_reset);
cc->class_by_name = ppc_cpu_class_by_name;
pcc->parent_parse_features = cc->parse_features;

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@ -462,8 +462,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
device_class_set_parent_realize(dc, riscv_cpu_realize,
&mcc->parent_realize);
mcc->parent_reset = cc->reset;
cc->reset = riscv_cpu_reset;
cpu_class_set_parent_reset(cc, riscv_cpu_reset, &mcc->parent_reset);
cc->class_by_name = riscv_cpu_class_by_name;
cc->has_work = riscv_cpu_has_work;

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@ -456,12 +456,11 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
dc->props = s390x_cpu_properties;
dc->user_creatable = true;
scc->parent_reset = cc->reset;
cpu_class_set_parent_reset(cc, s390_cpu_reset_full, &scc->parent_reset);
#if !defined(CONFIG_USER_ONLY)
scc->load_normal = s390_cpu_load_normal;
#endif
scc->reset = s390_cpu_reset;
cc->reset = s390_cpu_reset_full;
cc->class_by_name = s390_cpu_class_by_name,
cc->has_work = s390_cpu_has_work;
#ifdef CONFIG_TCG

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@ -214,8 +214,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, superh_cpu_realizefn,
&scc->parent_realize);
scc->parent_reset = cc->reset;
cc->reset = superh_cpu_reset;
cpu_class_set_parent_reset(cc, superh_cpu_reset, &scc->parent_reset);
cc->class_by_name = superh_cpu_class_by_name;
cc->has_work = superh_cpu_has_work;

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@ -859,8 +859,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
&scc->parent_realize);
dc->props = sparc_cpu_properties;
scc->parent_reset = cc->reset;
cc->reset = sparc_cpu_reset;
cpu_class_set_parent_reset(cc, sparc_cpu_reset, &scc->parent_reset);
cc->class_by_name = sparc_cpu_class_by_name;
cc->parse_features = sparc_cpu_parse_features;

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@ -142,8 +142,7 @@ static void tilegx_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, tilegx_cpu_realizefn,
&tcc->parent_realize);
tcc->parent_reset = cc->reset;
cc->reset = tilegx_cpu_reset;
cpu_class_set_parent_reset(cc, tilegx_cpu_reset, &tcc->parent_reset);
cc->class_by_name = tilegx_cpu_class_by_name;
cc->has_work = tilegx_cpu_has_work;

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@ -153,8 +153,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data)
device_class_set_parent_realize(dc, tricore_cpu_realizefn,
&mcc->parent_realize);
mcc->parent_reset = cc->reset;
cc->reset = tricore_cpu_reset;
cpu_class_set_parent_reset(cc, tricore_cpu_reset, &mcc->parent_reset);
cc->class_by_name = tricore_cpu_class_by_name;
cc->has_work = tricore_cpu_has_work;

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@ -184,8 +184,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, xtensa_cpu_realizefn,
&xcc->parent_realize);
xcc->parent_reset = cc->reset;
cc->reset = xtensa_cpu_reset;
cpu_class_set_parent_reset(cc, xtensa_cpu_reset, &xcc->parent_reset);
cc->class_by_name = xtensa_cpu_class_by_name;
cc->has_work = xtensa_cpu_has_work;