e05da09b7c
Zicbom is the Cache-Block Management extension defined in the already ratified RISC-V Base Cache Management Operation (CBO) ISA extension [1]. The extension contains three instructions: cbo.clean, cbo.flush and cbo.inval. All of them must be implemented in the same group as LQ and cbo.zero due to overlapping patterns. All these instructions can throw a Illegal Instruction/Virtual Instruction exception, similar to the existing cbo.zero. The same check_zicbo_envcfg() is used to handle these exceptions. Aside from that, these instructions also need to handle page faults and guest page faults. This is done in a new check_zicbom_access() helper. As with Zicboz, the cache block size for Zicbom is also configurable. Note that the spec determines that Zicbo[mp] and Zicboz can have different cache sizes (Section 2.7 of [1]), so we also include a 'cbom_blocksize' to go along with the existing 'cboz_blocksize'. They are set to the same size, so unless users want to play around with the settings both sizes will be the same. [1] https://github.com/riscv/riscv-CMOs/blob/master/specifications/cmobase-v1.0.1.pdf Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Co-developed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Signed-off-by: Christoph Muellner <cmuellner@linux.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20230224132536.552293-4-dbarboza@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> |
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trans_privileged.c.inc | ||
trans_rva.c.inc | ||
trans_rvb.c.inc | ||
trans_rvd.c.inc | ||
trans_rvf.c.inc | ||
trans_rvh.c.inc | ||
trans_rvi.c.inc | ||
trans_rvk.c.inc | ||
trans_rvm.c.inc | ||
trans_rvv.c.inc | ||
trans_rvzawrs.c.inc | ||
trans_rvzfh.c.inc | ||
trans_rvzicbo.c.inc | ||
trans_rvzicond.c.inc | ||
trans_svinval.c.inc | ||
trans_xthead.c.inc | ||
trans_xventanacondops.c.inc |