3d54cbf269
- Remove sysbus_add_io (Phil) - Build PPC 4xx PCI host bridges once (Phil) - Display QOM path while debugging SMBus targets (Joe) - Simplify x86 PC code (Bernhard) - Remove qemu_[un]register_reset() calls in x86 PC CMOS (Peter) - Fix wiring of ICH9 LPC interrupts (Bernhard) - Split core IDE as device / bus / dma (Thomas) - Prefer QDev API over QOM for devices (Phil) - Fix invalid use of DO_UPCAST() in Leon3 (Thomas) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXXQ1IACgkQ4+MsLN6t wN4e2xAAig55EJh/JwpdGx55rFUab3Ay22jgXrExmBir8hzhyzssY+RUj2ALRa5e T26kxCEqiuT549FtWm/ci6kVax0QD6bqz/6/j451XB9469Z/3BDOV5rhsqF6zlr5 BMbyC8PKnMUluG8v1ZuRjC3m2lK3ZvkVnZtj7SZUR50ssEnR32fVIziN14/OYkts 2B24sLrnLBfvyatMRsuFqGWrcbtMdnwNpjenGfDPOTF33W1sxTQ8GSvx1RV32l69 Yr/iCVoCl+rGxbLLP1TwqtOwzk32p8RsbIt6rWMqVMv/p5F6ezFeiOk7VHnnEJRH e7TPxt4XeLGPARMQLT3gQh0MGIIodanSHePRBkczuNmKYTJrz+5jMu2Qg4MmMUE/ TV0fKgdjh/edhAOHzJgZqLmNV71icl8WBjfsw2qT4ZwgJzWq7YM2/XZKkeWhk2nQ whLxfgiU4PNJ6vHhebJNjOovCYQTK2FbXR+PvVn5FEbH4CuFr8mqkYc+vNYM9dLA b7uMk1H8kcb5+kqfPPU2lVd1wO7uqhxYOYU2O9nYq8aw7ioLoLeEdj2IicLtrA/H GMtyA5cYeabeRzSXF30tM2AR1uQ/e4Z7oNxW6z3GVK1NrQtKilqPgMKut8uWYvva crJLpRQhGiY3sDrIkkCcAHzv256dZaJNLR1KPViaHOyVPZV+x2s= =+h2O -----END PGP SIGNATURE----- Merge tag 'hw-misc-20240222' of https://github.com/philmd/qemu into staging Misc HW patch queue - Remove sysbus_add_io (Phil) - Build PPC 4xx PCI host bridges once (Phil) - Display QOM path while debugging SMBus targets (Joe) - Simplify x86 PC code (Bernhard) - Remove qemu_[un]register_reset() calls in x86 PC CMOS (Peter) - Fix wiring of ICH9 LPC interrupts (Bernhard) - Split core IDE as device / bus / dma (Thomas) - Prefer QDev API over QOM for devices (Phil) - Fix invalid use of DO_UPCAST() in Leon3 (Thomas) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXXQ1IACgkQ4+MsLN6t # wN4e2xAAig55EJh/JwpdGx55rFUab3Ay22jgXrExmBir8hzhyzssY+RUj2ALRa5e # T26kxCEqiuT549FtWm/ci6kVax0QD6bqz/6/j451XB9469Z/3BDOV5rhsqF6zlr5 # BMbyC8PKnMUluG8v1ZuRjC3m2lK3ZvkVnZtj7SZUR50ssEnR32fVIziN14/OYkts # 2B24sLrnLBfvyatMRsuFqGWrcbtMdnwNpjenGfDPOTF33W1sxTQ8GSvx1RV32l69 # Yr/iCVoCl+rGxbLLP1TwqtOwzk32p8RsbIt6rWMqVMv/p5F6ezFeiOk7VHnnEJRH # e7TPxt4XeLGPARMQLT3gQh0MGIIodanSHePRBkczuNmKYTJrz+5jMu2Qg4MmMUE/ # TV0fKgdjh/edhAOHzJgZqLmNV71icl8WBjfsw2qT4ZwgJzWq7YM2/XZKkeWhk2nQ # whLxfgiU4PNJ6vHhebJNjOovCYQTK2FbXR+PvVn5FEbH4CuFr8mqkYc+vNYM9dLA # b7uMk1H8kcb5+kqfPPU2lVd1wO7uqhxYOYU2O9nYq8aw7ioLoLeEdj2IicLtrA/H # GMtyA5cYeabeRzSXF30tM2AR1uQ/e4Z7oNxW6z3GVK1NrQtKilqPgMKut8uWYvva # crJLpRQhGiY3sDrIkkCcAHzv256dZaJNLR1KPViaHOyVPZV+x2s= # =+h2O # -----END PGP SIGNATURE----- # gpg: Signature made Thu 22 Feb 2024 12:51:30 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20240222' of https://github.com/philmd/qemu: (32 commits) hw/sparc/leon3: Fix wrong usage of DO_UPCAST macro hw/ide: Stop exposing internal.h to non-IDE files hw/ide: Remove the include/hw/ide.h legacy file hw/ide: Move IDE bus related definitions to a new header ide-bus.h hw/ide: Move IDE device related definitions to ide-dev.h hw/ide: Move IDE DMA related definitions to a separate header ide-dma.h hw/ide: Split qdev.c into ide-bus.c and ide-dev.c hw/ide: Add the possibility to disable the CompactFlash device in the build hw/acpi/ich9_tco: Include missing 'migration/vmstate.h' header hw/acpi/cpu: Use CPUState typedef hw/acpi: Include missing 'qapi/qapi-types-acpi.h' generated header hw/isa/meson.build: Sort alphabetically hw/i386/pc_q35: Populate interrupt handlers before realizing LPC PCI function hw/i386/pc_sysfw: Use qdev_is_realized() instead of QOM API hw/i386/pc_sysfw: Inline pc_system_flash_create() and remove it hw/i386/pc: Confine system flash handling to pc_sysfw hw/i386/pc: Defer smbios_set_defaults() to machine_done hw/i386/pc: Merge pc_guest_info_init() into pc_machine_initfn() hw/i386/x86: Turn apic_xrupt_override into class attribute hw/i386/pc: Do pc_cmos_init_late() from pc_machine_done() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # include/hw/i386/pc.h
323 lines
9.0 KiB
C
323 lines
9.0 KiB
C
#ifndef HW_PC_H
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#define HW_PC_H
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#include "qemu/notify.h"
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#include "qapi/qapi-types-common.h"
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#include "qemu/uuid.h"
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#include "hw/boards.h"
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#include "hw/block/fdc.h"
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#include "hw/block/flash.h"
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#include "hw/i386/x86.h"
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#include "hw/hotplug.h"
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#include "qom/object.h"
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#include "hw/i386/sgx-epc.h"
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#include "hw/cxl/cxl.h"
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#define MAX_IDE_BUS 2
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/**
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* PCMachineState:
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* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
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* @boot_cpus: number of present VCPUs
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*/
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typedef struct PCMachineState {
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/*< private >*/
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X86MachineState parent_obj;
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/* <public> */
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/* State for other subsystems/APIs: */
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Notifier machine_done;
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/* Pointers to devices and objects: */
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PCIBus *bus;
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I2CBus *smbus;
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PFlashCFI01 *flash[2];
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ISADevice *pcspk;
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DeviceState *iommu;
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BusState *idebus[MAX_IDE_BUS];
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/* Configuration options: */
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uint64_t max_ram_below_4g;
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OnOffAuto vmport;
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SmbiosEntryPointType smbios_entry_point_type;
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const char *south_bridge;
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bool acpi_build_enabled;
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bool smbus_enabled;
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bool sata_enabled;
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bool hpet_enabled;
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bool i8042_enabled;
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bool default_bus_bypass_iommu;
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uint64_t max_fw_size;
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/* ACPI Memory hotplug IO base address */
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hwaddr memhp_io_base;
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SGXEPCState sgx_epc;
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CXLState cxl_devices_state;
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} PCMachineState;
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#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
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#define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
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#define PC_MACHINE_VMPORT "vmport"
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#define PC_MACHINE_SMBUS "smbus"
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#define PC_MACHINE_SATA "sata"
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#define PC_MACHINE_I8042 "i8042"
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#define PC_MACHINE_MAX_FW_SIZE "max-fw-size"
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#define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type"
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/**
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* PCMachineClass:
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*
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* Compat fields:
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*
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* @enforce_aligned_dimm: check that DIMM's address/size is aligned by
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* backend's alignment value if provided
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* @acpi_data_size: Size of the chunk of memory at the top of RAM
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* for the BIOS ACPI tables and other BIOS
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* datastructures.
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* @gigabyte_align: Make sure that guest addresses aligned at
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* 1Gbyte boundaries get mapped to host
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* addresses aligned at 1Gbyte boundaries. This
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* way we can use 1GByte pages in the host.
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*
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*/
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struct PCMachineClass {
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/*< private >*/
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X86MachineClass parent_class;
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/*< public >*/
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/* Device configuration: */
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bool pci_enabled;
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bool kvmclock_enabled;
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const char *default_south_bridge;
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/* Compat options: */
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/* Default CPU model version. See x86_cpu_set_default_version(). */
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int default_cpu_version;
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/* ACPI compat: */
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bool has_acpi_build;
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bool rsdp_in_ram;
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int legacy_acpi_table_size;
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unsigned acpi_data_size;
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int pci_root_uid;
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/* SMBIOS compat: */
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bool smbios_defaults;
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bool smbios_legacy_mode;
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bool smbios_uuid_encoded;
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SmbiosEntryPointType default_smbios_ep_type;
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/* RAM / address space compat: */
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bool gigabyte_align;
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bool has_reserved_memory;
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bool enforce_aligned_dimm;
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bool broken_reserved_end;
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bool enforce_amd_1tb_hole;
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/* generate legacy CPU hotplug AML */
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bool legacy_cpu_hotplug;
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/* use PVH to load kernels that support this feature */
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bool pvh_enabled;
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/* create kvmclock device even when KVM PV features are not exposed */
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bool kvmclock_create_always;
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/* resizable acpi blob compat */
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bool resizable_acpi_blob;
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/*
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* whether the machine type implements broken 32-bit address space bound
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* check for memory.
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*/
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bool broken_32bit_mem_addr_check;
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};
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#define TYPE_PC_MACHINE "generic-pc-machine"
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OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE)
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/* ioapic.c */
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GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
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/* pc.c */
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extern int fd_bootchk;
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void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
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#define PCI_HOST_PROP_RAM_MEM "ram-mem"
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#define PCI_HOST_PROP_PCI_MEM "pci-mem"
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#define PCI_HOST_PROP_SYSTEM_MEM "system-mem"
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#define PCI_HOST_PROP_IO_MEM "io-mem"
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#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
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#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
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#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
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#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
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#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
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#define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
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#define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
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void pc_pci_as_mapping_init(MemoryRegion *system_memory,
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MemoryRegion *pci_address_space);
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void xen_load_linux(PCMachineState *pcms);
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void pc_memory_init(PCMachineState *pcms,
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MemoryRegion *system_memory,
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MemoryRegion *rom_memory,
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uint64_t pci_hole64_size);
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uint64_t pc_pci_hole64_start(void);
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DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
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void pc_basic_device_init(struct PCMachineState *pcms,
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ISABus *isa_bus, qemu_irq *gsi,
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ISADevice *rtc_state,
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bool create_fdctrl,
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uint32_t hpet_irqs);
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void pc_cmos_init(PCMachineState *pcms,
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ISADevice *s);
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void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
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void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
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/* port92.c */
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#define PORT92_A20_LINE "a20"
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#define TYPE_PORT92 "port92"
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/* pc_sysfw.c */
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void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
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bool pc_system_ovmf_table_find(const char *entry, uint8_t **data,
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int *data_len);
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void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
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/* sgx.c */
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void pc_machine_init_sgx_epc(PCMachineState *pcms);
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extern GlobalProperty pc_compat_8_2[];
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extern const size_t pc_compat_8_2_len;
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extern GlobalProperty pc_compat_8_1[];
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extern const size_t pc_compat_8_1_len;
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extern GlobalProperty pc_compat_8_0[];
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extern const size_t pc_compat_8_0_len;
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extern GlobalProperty pc_compat_7_2[];
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extern const size_t pc_compat_7_2_len;
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extern GlobalProperty pc_compat_7_1[];
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extern const size_t pc_compat_7_1_len;
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extern GlobalProperty pc_compat_7_0[];
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extern const size_t pc_compat_7_0_len;
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extern GlobalProperty pc_compat_6_2[];
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extern const size_t pc_compat_6_2_len;
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extern GlobalProperty pc_compat_6_1[];
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extern const size_t pc_compat_6_1_len;
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extern GlobalProperty pc_compat_6_0[];
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extern const size_t pc_compat_6_0_len;
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extern GlobalProperty pc_compat_5_2[];
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extern const size_t pc_compat_5_2_len;
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extern GlobalProperty pc_compat_5_1[];
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extern const size_t pc_compat_5_1_len;
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extern GlobalProperty pc_compat_5_0[];
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extern const size_t pc_compat_5_0_len;
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extern GlobalProperty pc_compat_4_2[];
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extern const size_t pc_compat_4_2_len;
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extern GlobalProperty pc_compat_4_1[];
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extern const size_t pc_compat_4_1_len;
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extern GlobalProperty pc_compat_4_0[];
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extern const size_t pc_compat_4_0_len;
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extern GlobalProperty pc_compat_3_1[];
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extern const size_t pc_compat_3_1_len;
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extern GlobalProperty pc_compat_3_0[];
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extern const size_t pc_compat_3_0_len;
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extern GlobalProperty pc_compat_2_12[];
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extern const size_t pc_compat_2_12_len;
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extern GlobalProperty pc_compat_2_11[];
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extern const size_t pc_compat_2_11_len;
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extern GlobalProperty pc_compat_2_10[];
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extern const size_t pc_compat_2_10_len;
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extern GlobalProperty pc_compat_2_9[];
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extern const size_t pc_compat_2_9_len;
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extern GlobalProperty pc_compat_2_8[];
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extern const size_t pc_compat_2_8_len;
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extern GlobalProperty pc_compat_2_7[];
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extern const size_t pc_compat_2_7_len;
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extern GlobalProperty pc_compat_2_6[];
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extern const size_t pc_compat_2_6_len;
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extern GlobalProperty pc_compat_2_5[];
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extern const size_t pc_compat_2_5_len;
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extern GlobalProperty pc_compat_2_4[];
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extern const size_t pc_compat_2_4_len;
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extern GlobalProperty pc_compat_2_3[];
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extern const size_t pc_compat_2_3_len;
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extern GlobalProperty pc_compat_2_2[];
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extern const size_t pc_compat_2_2_len;
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extern GlobalProperty pc_compat_2_1[];
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extern const size_t pc_compat_2_1_len;
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extern GlobalProperty pc_compat_2_0[];
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extern const size_t pc_compat_2_0_len;
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extern GlobalProperty pc_compat_1_7[];
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extern const size_t pc_compat_1_7_len;
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extern GlobalProperty pc_compat_1_6[];
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extern const size_t pc_compat_1_6_len;
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extern GlobalProperty pc_compat_1_5[];
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extern const size_t pc_compat_1_5_len;
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extern GlobalProperty pc_compat_1_4[];
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extern const size_t pc_compat_1_4_len;
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#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
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static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
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{ \
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MachineClass *mc = MACHINE_CLASS(oc); \
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optsfn(mc); \
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mc->init = initfn; \
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} \
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static const TypeInfo pc_machine_type_##suffix = { \
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.name = namestr TYPE_MACHINE_SUFFIX, \
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.parent = TYPE_PC_MACHINE, \
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.class_init = pc_machine_##suffix##_class_init, \
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}; \
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static void pc_machine_init_##suffix(void) \
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{ \
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type_register(&pc_machine_type_##suffix); \
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} \
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type_init(pc_machine_init_##suffix)
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#endif
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