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Misc HW patch queue

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- Remove sysbus_add_io (Phil)
 - Build PPC 4xx PCI host bridges once (Phil)
 - Display QOM path while debugging SMBus targets (Joe)
 - Simplify x86 PC code (Bernhard)
 - Remove qemu_[un]register_reset() calls in x86 PC CMOS (Peter)
 - Fix wiring of ICH9 LPC interrupts (Bernhard)
 - Split core IDE as device / bus / dma (Thomas)
 - Prefer QDev API over QOM for devices (Phil)
 - Fix invalid use of DO_UPCAST() in Leon3 (Thomas)
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Merge tag 'hw-misc-20240222' of https://github.com/philmd/qemu into staging

Misc HW patch queue

- Remove sysbus_add_io (Phil)
- Build PPC 4xx PCI host bridges once (Phil)
- Display QOM path while debugging SMBus targets (Joe)
- Simplify x86 PC code (Bernhard)
- Remove qemu_[un]register_reset() calls in x86 PC CMOS (Peter)
- Fix wiring of ICH9 LPC interrupts (Bernhard)
- Split core IDE as device / bus / dma (Thomas)
- Prefer QDev API over QOM for devices (Phil)
- Fix invalid use of DO_UPCAST() in Leon3 (Thomas)

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# gpg: Signature made Thu 22 Feb 2024 12:51:30 GMT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'hw-misc-20240222' of https://github.com/philmd/qemu: (32 commits)
  hw/sparc/leon3: Fix wrong usage of DO_UPCAST macro
  hw/ide: Stop exposing internal.h to non-IDE files
  hw/ide: Remove the include/hw/ide.h legacy file
  hw/ide: Move IDE bus related definitions to a new header ide-bus.h
  hw/ide: Move IDE device related definitions to ide-dev.h
  hw/ide: Move IDE DMA related definitions to a separate header ide-dma.h
  hw/ide: Split qdev.c into ide-bus.c and ide-dev.c
  hw/ide: Add the possibility to disable the CompactFlash device in the build
  hw/acpi/ich9_tco: Include missing 'migration/vmstate.h' header
  hw/acpi/cpu: Use CPUState typedef
  hw/acpi: Include missing 'qapi/qapi-types-acpi.h' generated header
  hw/isa/meson.build: Sort alphabetically
  hw/i386/pc_q35: Populate interrupt handlers before realizing LPC PCI function
  hw/i386/pc_sysfw: Use qdev_is_realized() instead of QOM API
  hw/i386/pc_sysfw: Inline pc_system_flash_create() and remove it
  hw/i386/pc: Confine system flash handling to pc_sysfw
  hw/i386/pc: Defer smbios_set_defaults() to machine_done
  hw/i386/pc: Merge pc_guest_info_init() into pc_machine_initfn()
  hw/i386/x86: Turn apic_xrupt_override into class attribute
  hw/i386/pc: Do pc_cmos_init_late() from pc_machine_done()
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	include/hw/i386/pc.h
This commit is contained in:
Peter Maydell 2024-02-22 15:44:29 +00:00
commit 3d54cbf269
58 changed files with 607 additions and 534 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
MAINTAINERS
View File

@ -1423,6 +1423,7 @@ Bamboo
L: qemu-ppc@nongnu.org
S: Orphan
F: hw/ppc/ppc440_bamboo.c
F: hw/pci-host/ppc4xx_pci.c
F: tests/avocado/ppc_bamboo.py
e500
@ -1555,7 +1556,7 @@ L: qemu-ppc@nongnu.org
S: Maintained
F: hw/ppc/sam460ex.c
F: hw/ppc/ppc440_uc.c
F: hw/ppc/ppc440_pcix.c
F: hw/pci-host/ppc440_pcix.c
F: hw/display/sm501*
F: hw/ide/sii3112.c
F: hw/rtc/m41t80.c
@ -1936,7 +1937,6 @@ IDE
M: John Snow <jsnow@redhat.com>
L: qemu-block@nongnu.org
S: Odd Fixes
F: include/hw/ide.h
F: include/hw/ide/
F: hw/ide/
F: hw/block/block.c
@ -2070,6 +2070,7 @@ F: hw/ppc/ppc4xx*.c
F: hw/ppc/ppc440_uc.c
F: hw/ppc/ppc440.h
F: hw/i2c/ppc4xx_i2c.c
F: include/hw/pci-host/ppc4xx.h
F: include/hw/ppc/ppc4xx.h
F: include/hw/i2c/ppc4xx_i2c.h
F: hw/intc/ppc-uic.c

2
hw/arm/Kconfig
View File

@ -275,6 +275,8 @@ config SBSA_REF
select USB_XHCI_SYSBUS
select WDT_SBSA
select BOCHS_DISPLAY
select IDE_BUS
select IDE_DEV
config SABRELITE
bool

6
hw/core/sysbus.c
View File

@ -298,12 +298,6 @@ static char *sysbus_get_fw_dev_path(DeviceState *dev)
return g_strdup(qdev_fw_name(dev));
}
void sysbus_add_io(SysBusDevice *dev, hwaddr addr,
MemoryRegion *mem)
{
memory_region_add_subregion(get_system_io(), addr, mem);
}
MemoryRegion *sysbus_address_space(SysBusDevice *dev)
{
return get_system_memory();

8
hw/i2c/smbus_slave.c
View File

@ -25,11 +25,15 @@
#define DPRINTF(fmt, ...) \
do { printf("smbus(%02x): " fmt , dev->i2c.address, ## __VA_ARGS__); } while (0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
do { g_autofree char *qom_path = object_get_canonical_path(OBJECT(dev)); \
fprintf(stderr, "%s: smbus: error: " fmt , qom_path, ## __VA_ARGS__); \
exit(1); } while (0)
#else
#define DPRINTF(fmt, ...) do {} while(0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__);} while (0)
do { g_autofree char *qom_path = object_get_canonical_path(OBJECT(dev)); \
fprintf(stderr, "%s: smbus: error: " fmt , qom_path, ## __VA_ARGS__); \
} while (0)
#endif
enum {

3
hw/i386/acpi-common.c
View File

@ -99,6 +99,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
int i;
bool x2apic_mode = false;
MachineClass *mc = MACHINE_GET_CLASS(x86ms);
X86MachineClass *x86mc = X86_MACHINE_GET_CLASS(x86ms);
const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
AcpiTable table = { .sig = "APIC", .rev = 3, .oem_id = oem_id,
.oem_table_id = oem_table_id };
@ -121,7 +122,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
IO_APIC_SECONDARY_ADDRESS, IO_APIC_SECONDARY_IRQBASE);
}
if (x86ms->apic_xrupt_override) {
if (x86mc->apic_xrupt_override) {
build_xrupt_override(table_data, 0, 2,
0 /* Flags: Conforms to the specifications of the bus */);
}

12
hw/i386/fw_cfg.c
View File

@ -48,15 +48,25 @@ const char *fw_cfg_arch_key_name(uint16_t key)
return NULL;
}
void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg)
{
#ifdef CONFIG_SMBIOS
uint8_t *smbios_tables, *smbios_anchor;
size_t smbios_tables_len, smbios_anchor_len;
struct smbios_phys_mem_area *mem_array;
unsigned i, array_count;
MachineState *ms = MACHINE(pcms);
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
MachineClass *mc = MACHINE_GET_CLASS(pcms);
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
if (pcmc->smbios_defaults) {
/* These values are guest ABI, do not change */
smbios_set_defaults("QEMU", mc->desc, mc->name,
pcmc->smbios_legacy_mode, pcmc->smbios_uuid_encoded,
pcms->smbios_entry_point_type);
}
/* tell smbios about cpuid version and features */
smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);

3
hw/i386/fw_cfg.h
View File

@ -10,6 +10,7 @@
#define HW_I386_FW_CFG_H
#include "hw/boards.h"
#include "hw/i386/pc.h"
#include "hw/nvram/fw_cfg.h"
#define FW_CFG_IO_BASE 0x510
@ -22,7 +23,7 @@
FWCfgState *fw_cfg_arch_create(MachineState *ms,
uint16_t boot_cpus,
uint16_t apic_id_limit);
void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg);
void fw_cfg_build_smbios(PCMachineState *ms, FWCfgState *fw_cfg);
void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg);
void fw_cfg_add_acpi_dsdt(Aml *scope, FWCfgState *fw_cfg);

3
hw/i386/kvmvapic.c
View File

@ -16,6 +16,7 @@
#include "sysemu/hw_accel.h"
#include "sysemu/kvm.h"
#include "sysemu/runstate.h"
#include "exec/address-spaces.h"
#include "hw/i386/apic_internal.h"
#include "hw/sysbus.h"
#include "hw/boards.h"
@ -727,7 +728,7 @@ static void vapic_realize(DeviceState *dev, Error **errp)
VAPICROMState *s = VAPIC(dev);
memory_region_init_io(&s->io, OBJECT(s), &vapic_ops, s, "kvmvapic", 2);
sysbus_add_io(sbd, VAPIC_IO_PORT, &s->io);
memory_region_add_subregion(get_system_io(), VAPIC_IO_PORT, &s->io);
sysbus_init_ioports(sbd, VAPIC_IO_PORT, 2);
option_rom[nb_option_roms].name = "kvmvapic.bin";

60
hw/i386/pc.c
View File

@ -31,7 +31,7 @@
#include "hw/i386/fw_cfg.h"
#include "hw/i386/vmport.h"
#include "sysemu/cpus.h"
#include "hw/ide/internal.h"
#include "hw/ide/ide-bus.h"
#include "hw/timer/hpet.h"
#include "hw/loader.h"
#include "hw/rtc/mc146818rtc.h"
@ -465,11 +465,6 @@ static void pc_cmos_init_floppy(MC146818RtcState *rtc_state, ISADevice *floppy)
mc146818rtc_set_cmos_data(rtc_state, REG_EQUIPMENT_BYTE, val);
}
typedef struct pc_cmos_init_late_arg {
MC146818RtcState *rtc_state;
BusState *idebus[2];
} pc_cmos_init_late_arg;
typedef struct check_fdc_state {
ISADevice *floppy;
bool multiple;
@ -530,23 +525,25 @@ static ISADevice *pc_find_fdc0(void)
return state.floppy;
}
static void pc_cmos_init_late(void *opaque)
static void pc_cmos_init_late(PCMachineState *pcms)
{
pc_cmos_init_late_arg *arg = opaque;
MC146818RtcState *s = arg->rtc_state;
X86MachineState *x86ms = X86_MACHINE(pcms);
MC146818RtcState *s = MC146818_RTC(x86ms->rtc);
int16_t cylinders;
int8_t heads, sectors;
int val;
int i, trans;
val = 0;
if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 0,
&cylinders, &heads, &sectors) >= 0) {
if (pcms->idebus[0] &&
ide_get_geometry(pcms->idebus[0], 0,
&cylinders, &heads, &sectors) >= 0) {
cmos_init_hd(s, 0x19, 0x1b, cylinders, heads, sectors);
val |= 0xf0;
}
if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 1,
&cylinders, &heads, &sectors) >= 0) {
if (pcms->idebus[0] &&
ide_get_geometry(pcms->idebus[0], 1,
&cylinders, &heads, &sectors) >= 0) {
cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors);
val |= 0x0f;
}
@ -558,10 +555,11 @@ static void pc_cmos_init_late(void *opaque)
geometry. It is always such that: 1 <= sects <= 63, 1
<= heads <= 16, 1 <= cylinders <= 16383. The BIOS
geometry can be different if a translation is done. */
if (arg->idebus[i / 2] &&
ide_get_geometry(arg->idebus[i / 2], i % 2,
BusState *idebus = pcms->idebus[i / 2];
if (idebus &&
ide_get_geometry(idebus, i % 2,
&cylinders, &heads, &sectors) >= 0) {
trans = ide_get_bios_chs_trans(arg->idebus[i / 2], i % 2) - 1;
trans = ide_get_bios_chs_trans(idebus, i % 2) - 1;
assert((trans & ~3) == 0);
val |= trans << (i * 2);
}
@ -569,16 +567,12 @@ static void pc_cmos_init_late(void *opaque)
mc146818rtc_set_cmos_data(s, 0x39, val);
pc_cmos_init_floppy(s, pc_find_fdc0());
qemu_unregister_reset(pc_cmos_init_late, opaque);
}
void pc_cmos_init(PCMachineState *pcms,
BusState *idebus0, BusState *idebus1,
ISADevice *rtc)
{
int val;
static pc_cmos_init_late_arg arg;
X86MachineState *x86ms = X86_MACHINE(pcms);
MC146818RtcState *s = MC146818_RTC(rtc);
@ -632,11 +626,7 @@ void pc_cmos_init(PCMachineState *pcms,
val |= 0x04; /* PS/2 mouse installed */
mc146818rtc_set_cmos_data(s, REG_EQUIPMENT_BYTE, val);
/* hard drives and FDC */
arg.rtc_state = s;
arg.idebus[0] = idebus0;
arg.idebus[1] = idebus1;
qemu_register_reset(pc_cmos_init_late, &arg);
/* hard drives and FDC are handled by pc_cmos_init_late() */
}
static void handle_a20_line_change(void *opaque, int irq, int level)
@ -699,20 +689,13 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (x86ms->fw_cfg) {
fw_cfg_build_smbios(MACHINE(pcms), x86ms->fw_cfg);
fw_cfg_build_smbios(pcms, x86ms->fw_cfg);
fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
}
}
void pc_guest_info_init(PCMachineState *pcms)
{
X86MachineState *x86ms = X86_MACHINE(pcms);
x86ms->apic_xrupt_override = true;
pcms->machine_done.notify = pc_machine_done;
qemu_add_machine_init_done_notifier(&pcms->machine_done);
pc_cmos_init_late(pcms);
}
/* setup pci memory address space mapping into system address space */
@ -1195,7 +1178,8 @@ static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl,
port92 = isa_create_simple(isa_bus, TYPE_PORT92);
a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2);
i8042_setup_a20_line(i8042, a20_line[0]);
qdev_connect_gpio_out_named(DEVICE(i8042),
I8042_A20_LINE, 0, a20_line[0]);
qdev_connect_gpio_out_named(DEVICE(port92),
PORT92_A20_LINE, 0, a20_line[1]);
g_free(a20_line);
@ -1749,11 +1733,13 @@ static void pc_machine_initfn(Object *obj)
#endif
pcms->default_bus_bypass_iommu = false;
pc_system_flash_create(pcms);
pcms->pcspk = isa_new(TYPE_PC_SPEAKER);
object_property_add_alias(OBJECT(pcms), "pcspk-audiodev",
OBJECT(pcms->pcspk), "audiodev");
cxl_machine_init(obj, &pcms->cxl_devices_state);
pcms->machine_done.notify = pc_machine_done;
qemu_add_machine_init_done_notifier(&pcms->machine_done);
}
static void pc_machine_reset(MachineState *machine, ShutdownCause reason)
@ -1802,6 +1788,7 @@ static bool pc_hotplug_allowed(MachineState *ms, DeviceState *dev, Error **errp)
static void pc_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
X86MachineClass *x86mc = X86_MACHINE_CLASS(oc);
PCMachineClass *pcmc = PC_MACHINE_CLASS(oc);
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
@ -1821,6 +1808,7 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
pcmc->pvh_enabled = true;
pcmc->kvmclock_create_always = true;
pcmc->resizable_acpi_blob = true;
x86mc->apic_xrupt_override = true;
assert(!mc->get_hotplug_handler);
mc->get_hotplug_handler = pc_get_hotplug_handler;
mc->hotplug_allowed = pc_hotplug_allowed;

31
hw/i386/pc_piix.c
View File

@ -36,7 +36,6 @@
#include "hw/rtc/mc146818rtc.h"
#include "hw/southbridge/piix.h"
#include "hw/display/ramfb.h"
#include "hw/firmware/smbios.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_ids.h"
#include "hw/usb.h"
@ -68,7 +67,6 @@
#include "kvm/kvm-cpu.h"
#include "target/i386/cpu.h"
#define MAX_IDE_BUS 2
#define XEN_IOAPIC_NUM_PIRQS 128ULL
#ifdef CONFIG_IDE_ISA
@ -114,7 +112,6 @@ static void pc_init1(MachineState *machine,
Object *piix4_pm = NULL;
qemu_irq smi_irq;
GSIState *gsi_state;
BusState *idebus[MAX_IDE_BUS];
ISADevice *rtc_state;
MemoryRegion *ram_memory;
MemoryRegion *pci_memory = NULL;
@ -227,17 +224,6 @@ static void pc_init1(MachineState *machine,
&error_abort);
}
pc_guest_info_init(pcms);
if (pcmc->smbios_defaults) {
MachineClass *mc = MACHINE_GET_CLASS(machine);
/* These values are guest ABI, do not change */
smbios_set_defaults("QEMU", mc->desc,
mc->name, pcmc->smbios_legacy_mode,
pcmc->smbios_uuid_encoded,
pcms->smbios_entry_point_type);
}
/* allocate ram and load rom/bios */
if (!xen_enabled()) {
pc_memory_init(pcms, system_memory, rom_memory, hole64_size);
@ -245,7 +231,6 @@ static void pc_init1(MachineState *machine,
assert(machine->ram_size == x86ms->below_4g_mem_size +
x86ms->above_4g_mem_size);
pc_system_flash_cleanup_unused(pcms);
if (machine->kernel_filename != NULL) {
/* For xen HVM direct kernel boot, load linux here */
xen_load_linux(pcms);
@ -299,8 +284,8 @@ static void pc_init1(MachineState *machine,
piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
pci_ide_create_devs(PCI_DEVICE(dev));
idebus[0] = qdev_get_child_bus(dev, "ide.0");
idebus[1] = qdev_get_child_bus(dev, "ide.1");
pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0");
pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1");
} else {
isa_bus = isa_bus_new(NULL, system_memory, system_io,
&error_abort);
@ -312,8 +297,6 @@ static void pc_init1(MachineState *machine,
i8257_dma_init(OBJECT(machine), isa_bus, 0);
pcms->hpet_enabled = false;
idebus[0] = NULL;
idebus[1] = NULL;
}
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
@ -341,11 +324,8 @@ static void pc_init1(MachineState *machine,
pc_nic_init(pcmc, isa_bus, pci_bus);
if (pcmc->pci_enabled) {
pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
}
#ifdef CONFIG_IDE_ISA
else {
if (!pcmc->pci_enabled) {
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
int i;
@ -361,12 +341,13 @@ static void pc_init1(MachineState *machine,
* second one.
*/
busname[4] = '0' + i;
idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
pcms->idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
}
pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
}
#endif
pc_cmos_init(pcms, rtc_state);
if (piix4_pm) {
smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);

22
hw/i386/pc_q35.c
View File

@ -45,7 +45,6 @@
#include "hw/i386/amd_iommu.h"
#include "hw/i386/intel_iommu.h"
#include "hw/display/ramfb.h"
#include "hw/firmware/smbios.h"
#include "hw/ide/pci.h"
#include "hw/ide/ahci-pci.h"
#include "hw/intc/ioapic.h"
@ -126,7 +125,6 @@ static void pc_q35_init(MachineState *machine)
PCIBus *host_bus;
PCIDevice *lpc;
DeviceState *lpc_dev;
BusState *idebus[MAX_SATA_PORTS];
ISADevice *rtc_state;
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *system_io = get_system_io();
@ -189,16 +187,6 @@ static void pc_q35_init(MachineState *machine)
kvmclock_create(pcmc->kvmclock_create_always);
}
pc_guest_info_init(pcms);
if (pcmc->smbios_defaults) {
/* These values are guest ABI, do not change */
smbios_set_defaults("QEMU", mc->desc,
mc->name, pcmc->smbios_legacy_mode,
pcmc->smbios_uuid_encoded,
pcms->smbios_entry_point_type);
}
/* create pci host bus */
phb = OBJECT(qdev_new(TYPE_Q35_HOST_DEVICE));
@ -240,10 +228,10 @@ static void pc_q35_init(MachineState *machine)
lpc_dev = DEVICE(lpc);
qdev_prop_set_bit(lpc_dev, "smm-enabled",
x86_machine_is_smm_enabled(x86ms));
pci_realize_and_unref(lpc, host_bus, &error_fatal);
for (i = 0; i < IOAPIC_NUM_PINS; i++) {
qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
}
pci_realize_and_unref(lpc, host_bus, &error_fatal);
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "rtc"));
@ -300,13 +288,11 @@ static void pc_q35_init(MachineState *machine)
ICH9_SATA1_FUNC),
"ich9-ahci");
ich9 = ICH9_AHCI(pdev);
idebus[0] = qdev_get_child_bus(DEVICE(pdev), "ide.0");
idebus[1] = qdev_get_child_bus(DEVICE(pdev), "ide.1");
pcms->idebus[0] = qdev_get_child_bus(DEVICE(pdev), "ide.0");
pcms->idebus[1] = qdev_get_child_bus(DEVICE(pdev), "ide.1");
g_assert(MAX_SATA_PORTS == ich9->ahci.ports);
ide_drive_get(hd, ich9->ahci.ports);
ahci_ide_create_devs(&ich9->ahci, hd);
} else {
idebus[0] = idebus[1] = NULL;
}
if (machine_usb(machine)) {
@ -327,7 +313,7 @@ static void pc_q35_init(MachineState *machine)
smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
}
pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
pc_cmos_init(pcms, rtc_state);
/* the rest devices to which pci devfn is automatically assigned */
pc_vga_init(isa_bus, host_bus);

23
hw/i386/pc_sysfw.c
View File

@ -91,33 +91,19 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms,
return PFLASH_CFI01(dev);
}
void pc_system_flash_create(PCMachineState *pcms)
{
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
if (pcmc->pci_enabled) {
pcms->flash[0] = pc_pflash_create(pcms, "system.flash0",
"pflash0");
pcms->flash[1] = pc_pflash_create(pcms, "system.flash1",
"pflash1");
}
}
void pc_system_flash_cleanup_unused(PCMachineState *pcms)
static void pc_system_flash_cleanup_unused(PCMachineState *pcms)
{
char *prop_name;
int i;
Object *dev_obj;
assert(PC_MACHINE_GET_CLASS(pcms)->pci_enabled);
for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) {
dev_obj = OBJECT(pcms->flash[i]);
if (!object_property_get_bool(dev_obj, "realized", &error_abort)) {
if (!qdev_is_realized(DEVICE(pcms->flash[i]))) {
prop_name = g_strdup_printf("pflash%d", i);
object_property_del(OBJECT(pcms), prop_name);
g_free(prop_name);
object_unparent(dev_obj);
object_unparent(OBJECT(pcms->flash[i]));
pcms->flash[i] = NULL;
}
}
@ -212,6 +198,9 @@ void pc_system_firmware_init(PCMachineState *pcms,
return;
}
pcms->flash[0] = pc_pflash_create(pcms, "system.flash0", "pflash0");
pcms->flash[1] = pc_pflash_create(pcms, "system.flash1", "pflash1");
/* Map legacy -drive if=pflash to machine properties */
for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) {
pflash_cfi01_legacy_drive(pcms->flash[i],

32
hw/ide/Kconfig
View File

@ -1,51 +1,58 @@
config IDE_CORE
bool
config IDE_QDEV
config IDE_BUS
bool
select IDE_CORE
config IDE_DEV
bool
depends on IDE_BUS
config IDE_PCI
bool
depends on PCI
select IDE_QDEV
select IDE_BUS
select IDE_DEV
config IDE_ISA
bool
depends on ISA_BUS
select IDE_QDEV
select IDE_BUS
select IDE_DEV
config IDE_PIIX
bool
select IDE_PCI
select IDE_QDEV
config IDE_CMD646
bool
select IDE_PCI
select IDE_QDEV
config IDE_MACIO
bool
select IDE_QDEV
select IDE_BUS
select IDE_DEV
config IDE_MMIO
bool
select IDE_QDEV
select IDE_BUS
select IDE_DEV
config IDE_VIA
bool
select IDE_PCI
select IDE_QDEV
config MICRODRIVE
bool
select IDE_QDEV
select IDE_BUS
select IDE_DEV
depends on PCMCIA
config AHCI
bool
select IDE_QDEV
select IDE_BUS
select IDE_DEV
config AHCI_ICH9
bool
@ -56,4 +63,7 @@ config AHCI_ICH9
config IDE_SII3112
bool
select IDE_PCI
select IDE_QDEV
config IDE_CF
bool
default y if IDE_BUS

58
hw/ide/cf.c Normal file
View File

@ -0,0 +1,58 @@
/*
* ide CompactFlash support
*
* This code is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "hw/ide/ide-dev.h"
#include "qapi/qapi-types-block.h"
static void ide_cf_realize(IDEDevice *dev, Error **errp)
{
ide_dev_initfn(dev, IDE_CFATA, errp);
}
static Property ide_cf_properties[] = {
DEFINE_IDE_DEV_PROPERTIES(),
DEFINE_BLOCK_CHS_PROPERTIES(IDEDrive, dev.conf),
DEFINE_PROP_BIOS_CHS_TRANS("bios-chs-trans",
IDEDrive, dev.chs_trans, BIOS_ATA_TRANSLATION_AUTO),
DEFINE_PROP_END_OF_LIST(),
};
static void ide_cf_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
IDEDeviceClass *k = IDE_DEVICE_CLASS(klass);
k->realize = ide_cf_realize;
dc->fw_name = "drive";
dc->desc = "virtual CompactFlash card";
device_class_set_props(dc, ide_cf_properties);
}
static const TypeInfo ide_cf_info = {
.name = "ide-cf",
.parent = TYPE_IDE_DEVICE,
.instance_size = sizeof(IDEDrive),
.class_init = ide_cf_class_init,
};
static void ide_cf_register_type(void)
{
type_register_static(&ide_cf_info);
}
type_init(ide_cf_register_type)

1
hw/ide/cmd646.c
View File

@ -33,6 +33,7 @@
#include "sysemu/reset.h"
#include "hw/ide/pci.h"
#include "hw/ide/internal.h"
#include "trace.h"
/* CMD646 specific */

111
hw/ide/ide-bus.c Normal file
View File

@ -0,0 +1,111 @@
/*
* ide bus support for qdev.
*
* Copyright (c) 2009 Gerd Hoffmann <kraxel@redhat.com>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
#include "hw/ide/internal.h"
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
#include "sysemu/runstate.h"
static char *idebus_get_fw_dev_path(DeviceState *dev);
static void idebus_unrealize(BusState *qdev);
static void ide_bus_class_init(ObjectClass *klass, void *data)
{
BusClass *k = BUS_CLASS(klass);
k->get_fw_dev_path = idebus_get_fw_dev_path;
k->unrealize = idebus_unrealize;
}
static void idebus_unrealize(BusState *bus)
{
IDEBus *ibus = IDE_BUS(bus);
if (ibus->vmstate) {
qemu_del_vm_change_state_handler(ibus->vmstate);
}
}
static const TypeInfo ide_bus_info = {
.name = TYPE_IDE_BUS,
.parent = TYPE_BUS,
.instance_size = sizeof(IDEBus),
.class_init = ide_bus_class_init,
};
void ide_bus_init(IDEBus *idebus, size_t idebus_size, DeviceState *dev,
int bus_id, int max_units)
{
qbus_init(idebus, idebus_size, TYPE_IDE_BUS, dev, NULL);
idebus->bus_id = bus_id;
idebus->max_units = max_units;
}
static char *idebus_get_fw_dev_path(DeviceState *dev)
{
char path[30];
snprintf(path, sizeof(path), "%s@%x", qdev_fw_name(dev),
((IDEBus *)dev->parent_bus)->bus_id);
return g_strdup(path);
}
IDEDevice *ide_bus_create_drive(IDEBus *bus, int unit, DriveInfo *drive)
{
DeviceState *dev;
dev = qdev_new(drive->media_cd ? "ide-cd" : "ide-hd");
qdev_prop_set_uint32(dev, "unit", unit);
qdev_prop_set_drive_err(dev, "drive", blk_by_legacy_dinfo(drive),
&error_fatal);
qdev_realize_and_unref(dev, &bus->qbus, &error_fatal);
return DO_UPCAST(IDEDevice, qdev, dev);
}
int ide_get_geometry(BusState *bus, int unit,
int16_t *cyls, int8_t *heads, int8_t *secs)
{
IDEState *s = &DO_UPCAST(IDEBus, qbus, bus)->ifs[unit];
if (s->drive_kind != IDE_HD || !s->blk) {
return -1;
}
*cyls = s->cylinders;
*heads = s->heads;
*secs = s->sectors;
return 0;
}
int ide_get_bios_chs_trans(BusState *bus, int unit)
{
return DO_UPCAST(IDEBus, qbus, bus)->ifs[unit].chs_trans;
}
static void ide_bus_register_type(void)
{
type_register_static(&ide_bus_info);
}
type_init(ide_bus_register_type)

137
hw/ide/qdev.c → hw/ide/ide-dev.c
View File

@ -1,5 +1,5 @@
/*
* ide bus support for qdev.
* IDE device functions
*
* Copyright (c) 2009 Gerd Hoffmann <kraxel@redhat.com>
*
@ -18,74 +18,22 @@
*/
#include "qemu/osdep.h"
#include "sysemu/dma.h"
#include "qapi/error.h"
#include "qapi/qapi-types-block.h"
#include "qemu/error-report.h"
#include "qemu/main-loop.h"
#include "qemu/module.h"
#include "hw/ide/ide-dev.h"
#include "hw/ide/internal.h"
#include "hw/qdev-properties.h"
#include "hw/qdev-properties-system.h"
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
#include "hw/block/block.h"
#include "sysemu/sysemu.h"
#include "sysemu/runstate.h"
#include "qapi/visitor.h"
/* --------------------------------- */
static char *idebus_get_fw_dev_path(DeviceState *dev);
static void idebus_unrealize(BusState *qdev);
static Property ide_props[] = {
DEFINE_PROP_UINT32("unit", IDEDevice, unit, -1),
DEFINE_PROP_END_OF_LIST(),
};
static void ide_bus_class_init(ObjectClass *klass, void *data)
{
BusClass *k = BUS_CLASS(klass);
k->get_fw_dev_path = idebus_get_fw_dev_path;
k->unrealize = idebus_unrealize;
}
static void idebus_unrealize(BusState *bus)
{
IDEBus *ibus = IDE_BUS(bus);
if (ibus->vmstate) {
qemu_del_vm_change_state_handler(ibus->vmstate);
}
}
static const TypeInfo ide_bus_info = {
.name = TYPE_IDE_BUS,
.parent = TYPE_BUS,
.instance_size = sizeof(IDEBus),
.class_init = ide_bus_class_init,
};
void ide_bus_init(IDEBus *idebus, size_t idebus_size, DeviceState *dev,
int bus_id, int max_units)
{
qbus_init(idebus, idebus_size, TYPE_IDE_BUS, dev, NULL);
idebus->bus_id = bus_id;
idebus->max_units = max_units;
}
static char *idebus_get_fw_dev_path(DeviceState *dev)
{
char path[30];
snprintf(path, sizeof(path), "%s@%x", qdev_fw_name(dev),
((IDEBus*)dev->parent_bus)->bus_id);
return g_strdup(path);
}
static void ide_qdev_realize(DeviceState *qdev, Error **errp)
{
IDEDevice *dev = IDE_DEVICE(qdev);
@ -124,45 +72,7 @@ static void ide_qdev_realize(DeviceState *qdev, Error **errp)
dc->realize(dev, errp);
}
IDEDevice *ide_bus_create_drive(IDEBus *bus, int unit, DriveInfo *drive)
{
DeviceState *dev;
dev = qdev_new(drive->media_cd ? "ide-cd" : "ide-hd");
qdev_prop_set_uint32(dev, "unit", unit);
qdev_prop_set_drive_err(dev, "drive", blk_by_legacy_dinfo(drive),
&error_fatal);
qdev_realize_and_unref(dev, &bus->qbus, &error_fatal);
return DO_UPCAST(IDEDevice, qdev, dev);
}
int ide_get_geometry(BusState *bus, int unit,
int16_t *cyls, int8_t *heads, int8_t *secs)
{
IDEState *s = &DO_UPCAST(IDEBus, qbus, bus)->ifs[unit];
if (s->drive_kind != IDE_HD || !s->blk) {
return -1;
}
*cyls = s->cylinders;
*heads = s->heads;
*secs = s->sectors;
return 0;
}
int ide_get_bios_chs_trans(BusState *bus, int unit)
{
return DO_UPCAST(IDEBus, qbus, bus)->ifs[unit].chs_trans;
}
/* --------------------------------- */
typedef struct IDEDrive {
IDEDevice dev;
} IDEDrive;
static void ide_dev_initfn(IDEDevice *dev, IDEDriveKind kind, Error **errp)
void ide_dev_initfn(IDEDevice *dev, IDEDriveKind kind, Error **errp)
{
IDEBus *bus = DO_UPCAST(IDEBus, qbus, dev->qdev.parent_bus);
IDEState *s = bus->ifs + dev->unit;
@ -283,19 +193,6 @@ static void ide_cd_realize(IDEDevice *dev, Error **errp)
ide_dev_initfn(dev, IDE_CD, errp);
}
static void ide_cf_realize(IDEDevice *dev, Error **errp)
{
ide_dev_initfn(dev, IDE_CFATA, errp);
}
#define DEFINE_IDE_DEV_PROPERTIES() \
DEFINE_BLOCK_PROPERTIES(IDEDrive, dev.conf), \
DEFINE_BLOCK_ERROR_PROPERTIES(IDEDrive, dev.conf), \
DEFINE_PROP_STRING("ver", IDEDrive, dev.version), \
DEFINE_PROP_UINT64("wwn", IDEDrive, dev.wwn, 0), \
DEFINE_PROP_STRING("serial", IDEDrive, dev.serial),\
DEFINE_PROP_STRING("model", IDEDrive, dev.model)
static Property ide_hd_properties[] = {
DEFINE_IDE_DEV_PROPERTIES(),
DEFINE_BLOCK_CHS_PROPERTIES(IDEDrive, dev.conf),
@ -346,32 +243,6 @@ static const TypeInfo ide_cd_info = {
.class_init = ide_cd_class_init,
};
static Property ide_cf_properties[] = {
DEFINE_IDE_DEV_PROPERTIES(),
DEFINE_BLOCK_CHS_PROPERTIES(IDEDrive, dev.conf),
DEFINE_PROP_BIOS_CHS_TRANS("bios-chs-trans",
IDEDrive, dev.chs_trans, BIOS_ATA_TRANSLATION_AUTO),
DEFINE_PROP_END_OF_LIST(),
};
static void ide_cf_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
IDEDeviceClass *k = IDE_DEVICE_CLASS(klass);
k->realize = ide_cf_realize;
dc->fw_name = "drive";
dc->desc = "virtual CompactFlash card";
device_class_set_props(dc, ide_cf_properties);
}
static const TypeInfo ide_cf_info = {
.name = "ide-cf",
.parent = TYPE_IDE_DEVICE,
.instance_size = sizeof(IDEDrive),
.class_init = ide_cf_class_init,
};
static void ide_device_class_init(ObjectClass *klass, void *data)
{
DeviceClass *k = DEVICE_CLASS(klass);
@ -393,10 +264,8 @@ static const TypeInfo ide_device_type_info = {
static void ide_register_types(void)
{
type_register_static(&ide_bus_info);
type_register_static(&ide_hd_info);
type_register_static(&ide_cd_info);
type_register_static(&ide_cf_info);
type_register_static(&ide_device_type_info);
}

4
hw/ide/meson.build
View File

@ -1,14 +1,16 @@
system_ss.add(when: 'CONFIG_AHCI', if_true: files('ahci.c'))
system_ss.add(when: 'CONFIG_AHCI_ICH9', if_true: files('ich.c'))
system_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('ahci-allwinner.c'))
system_ss.add(when: 'CONFIG_IDE_BUS', if_true: files('ide-bus.c'))
system_ss.add(when: 'CONFIG_IDE_CF', if_true: files('cf.c'))
system_ss.add(when: 'CONFIG_IDE_CMD646', if_true: files('cmd646.c'))
system_ss.add(when: 'CONFIG_IDE_CORE', if_true: files('core.c', 'atapi.c'))
system_ss.add(when: 'CONFIG_IDE_DEV', if_true: files('ide-dev.c'))
system_ss.add(when: 'CONFIG_IDE_ISA', if_true: files('isa.c', 'ioport.c'))
system_ss.add(when: 'CONFIG_IDE_MACIO', if_true: files('macio.c'))
system_ss.add(when: 'CONFIG_IDE_MMIO', if_true: files('mmio.c'))
system_ss.add(when: 'CONFIG_IDE_PCI', if_true: files('pci.c'))
system_ss.add(when: 'CONFIG_IDE_PIIX', if_true: files('piix.c', 'ioport.c'))
system_ss.add(when: 'CONFIG_IDE_QDEV', if_true: files('qdev.c'))
system_ss.add(when: 'CONFIG_IDE_SII3112', if_true: files('sii3112.c'))
system_ss.add(when: 'CONFIG_IDE_VIA', if_true: files('via.c'))
system_ss.add(when: 'CONFIG_MICRODRIVE', if_true: files('microdrive.c'))

1
hw/ide/pci.c
View File

@ -30,6 +30,7 @@
#include "sysemu/dma.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
#include "hw/ide/internal.h"
#include "hw/ide/pci.h"
#include "trace.h"

1
hw/ide/piix.c
View File

@ -30,6 +30,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/pci/pci.h"
#include "hw/ide/internal.h"
#include "hw/ide/piix.h"
#include "hw/ide/pci.h"
#include "trace.h"

1
hw/ide/sii3112.c
View File

@ -13,6 +13,7 @@
*/
#include "qemu/osdep.h"
#include "hw/ide/internal.h"
#include "hw/ide/pci.h"
#include "qemu/module.h"
#include "trace.h"

1
hw/ide/via.c
View File

@ -25,6 +25,7 @@
*/
#include "qemu/osdep.h"
#include "hw/ide/internal.h"
#include "hw/pci/pci.h"
#include "migration/vmstate.h"
#include "qemu/module.h"

5
hw/input/pckbd.c
View File

@ -777,11 +777,6 @@ void i8042_isa_mouse_fake_event(ISAKBDState *isa)
ps2_mouse_fake_event(&s->ps2mouse);
}
void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out)
{
qdev_connect_gpio_out_named(DEVICE(dev), I8042_A20_LINE, 0, a20_out);
}
static const VMStateDescription vmstate_kbd_isa = {
.name = "pckbd",
.version_id = 3,

2
hw/isa/meson.build
View File

@ -1,10 +1,10 @@
system_ss.add(when: 'CONFIG_APM', if_true: files('apm.c'))
system_ss.add(when: 'CONFIG_FDC37M81X', if_true: files('fdc37m81x-superio.c'))
system_ss.add(when: 'CONFIG_I82378', if_true: files('i82378.c'))
system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('isa-bus.c'))
system_ss.add(when: 'CONFIG_ISA_SUPERIO', if_true: files('isa-superio.c'))
system_ss.add(when: 'CONFIG_PC87312', if_true: files('pc87312.c'))
system_ss.add(when: 'CONFIG_PIIX', if_true: files('piix.c'))
system_ss.add(when: 'CONFIG_FDC37M81X', if_true: files('fdc37m81x-superio.c'))
system_ss.add(when: 'CONFIG_SMC37C669', if_true: files('smc37c669-superio.c'))
system_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686.c'))

3
hw/mips/mipssim.c
View File

@ -28,6 +28,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/datadir.h"
#include "exec/address-spaces.h"
#include "hw/clock.h"
#include "hw/mips/mips.h"
#include "hw/char/serial.h"
@ -226,7 +227,7 @@ mips_mipssim_init(MachineState *machine)
qdev_prop_set_uint8(dev, "endianness", DEVICE_LITTLE_ENDIAN);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]);
sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8,
memory_region_add_subregion(get_system_io(), 0x3f8,
sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
}

6
hw/nvram/fw_cfg.c
View File

@ -27,6 +27,7 @@
#include "sysemu/sysemu.h"
#include "sysemu/dma.h"
#include "sysemu/reset.h"
#include "exec/address-spaces.h"
#include "hw/boards.h"
#include "hw/nvram/fw_cfg.h"
#include "hw/qdev-properties.h"
@ -1142,6 +1143,7 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase,
SysBusDevice *sbd;
FWCfgIoState *ios;
FWCfgState *s;
MemoryRegion *iomem = get_system_io();
bool dma_requested = dma_iobase && dma_as;
dev = qdev_new(TYPE_FW_CFG_IO);
@ -1155,7 +1157,7 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase,
sbd = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(sbd, &error_fatal);
ios = FW_CFG_IO(dev);
sysbus_add_io(sbd, iobase, &ios->comb_iomem);
memory_region_add_subregion(iomem, iobase, &ios->comb_iomem);
s = FW_CFG(dev);
@ -1163,7 +1165,7 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase,
/* 64 bits for the address field */
s->dma_as = dma_as;
s->dma_addr = 0;
sysbus_add_io(sbd, dma_iobase, &s->dma_iomem);
memory_region_add_subregion(iomem, dma_iobase, &s->dma_iomem);
}
return s;

8
hw/pci-host/Kconfig
View File

@ -6,6 +6,14 @@ config XEN_IGD_PASSTHROUGH
default y
depends on XEN && PCI_I440FX
config PPC4XX_PCI
bool
select PCI
config PPC440_PCIX
bool
select PCI
config RAVEN_PCI
bool
select PCI

2
hw/pci-host/meson.build
View File

@ -14,6 +14,8 @@ pci_ss.add(when: 'CONFIG_REMOTE_PCIHOST', if_true: files('remote.c'))
pci_ss.add(when: 'CONFIG_SH_PCI', if_true: files('sh_pci.c'))
# PPC devices
pci_ss.add(when: 'CONFIG_PPC4XX_PCI', if_true: files('ppc4xx_pci.c'))
pci_ss.add(when: 'CONFIG_PPC440_PCIX', if_true: files('ppc440_pcix.c'))
pci_ss.add(when: 'CONFIG_RAVEN_PCI', if_true: files('raven.c'))
pci_ss.add(when: 'CONFIG_GRACKLE_PCI', if_true: files('grackle.c'))
# NewWorld PowerMac

3
hw/ppc/ppc440_pcix.c → hw/pci-host/ppc440_pcix.c
View File

@ -25,8 +25,7 @@
#include "qemu/module.h"
#include "qemu/units.h"
#include "hw/irq.h"
#include "hw/ppc/ppc.h"
#include "hw/ppc/ppc4xx.h"
#include "hw/pci-host/ppc4xx.h"
#include "hw/pci/pci_device.h"
#include "hw/pci/pci_host.h"
#include "trace.h"

3
hw/ppc/ppc4xx_pci.c → hw/pci-host/ppc4xx_pci.c
View File

@ -24,8 +24,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "hw/irq.h"
#include "hw/ppc/ppc.h"
#include "hw/ppc/ppc4xx.h"
#include "hw/pci-host/ppc4xx.h"
#include "migration/vmstate.h"
#include "qemu/module.h"
#include "sysemu/reset.h"

2
hw/pci-host/ppce500.c
View File

@ -5,7 +5,7 @@
*
* Author: Yu Liu, <yu.liu@freescale.com>
*
* This file is derived from hw/ppc4xx_pci.c,
* This file is derived from ppc4xx_pci.c,
* the copyright for that material belongs to the original owners.
*
* This is free software; you can redistribute it and/or modify

12
hw/pci-host/trace-events
View File

@ -37,6 +37,18 @@ unin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64
unin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
# ppc4xx_pci.c
ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
ppc4xx_pci_set_irq(int irq_num) "PCI irq %d"
# ppc440_pcix.c
ppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
ppc440_pcix_set_irq(int irq_num) "PCI irq %d"
ppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) "Added window %d of size=0x%" PRIx64 " to CPU=0x%" PRIx64
ppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia) "Added window %d of size=0x%x from CPU=0x%" PRIx64 " to PCI=0x%" PRIx64
ppc440_pcix_reg_read(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32
ppc440_pcix_reg_write(uint64_t addr, uint32_t val, uint32_t size) "addr 0x%" PRIx64 " = 0x%" PRIx32 " size 0x%" PRIx32
# pnv_phb4.c
pnv_phb4_xive_notify(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64
pnv_phb4_xive_notify_ic(uint64_t addr, uint64_t data) "addr=@0x%"PRIx64" data=0x%"PRIx64

3
hw/ppc/Kconfig
View File

@ -46,6 +46,7 @@ config PPC440
imply TEST_DEVICES
imply E1000_PCI
select PCI_EXPRESS
select PPC440_PCIX
select PPC4XX
select SERIAL
select FDT_PPC
@ -53,7 +54,7 @@ config PPC440
config PPC4XX
bool
select BITBANG_I2C
select PCI
select PPC4XX_PCI
select PPC_UIC
config SAM460EX

3
hw/ppc/meson.build
View File

@ -60,10 +60,9 @@ ppc_ss.add(when: 'CONFIG_PPC405', if_true: files(
'ppc405_uc.c'))
ppc_ss.add(when: 'CONFIG_PPC440', if_true: files(
'ppc440_bamboo.c',
'ppc440_pcix.c', 'ppc440_uc.c'))
'ppc440_uc.c'))
ppc_ss.add(when: 'CONFIG_PPC4XX', if_true: files(
'ppc4xx_devs.c',
'ppc4xx_pci.c',
'ppc4xx_sdram.c'))
ppc_ss.add(when: 'CONFIG_SAM460EX', if_true: files('sam460ex.c'))
# PReP

10
hw/ppc/pnv_bmc.c
View File

@ -269,13 +269,13 @@ void pnv_bmc_set_pnor(IPMIBmc *bmc, PnvPnor *pnor)
*/
IPMIBmc *pnv_bmc_create(PnvPnor *pnor)
{
Object *obj;
DeviceState *dev;
obj = object_new(TYPE_IPMI_BMC_SIMULATOR);
qdev_realize(DEVICE(obj), NULL, &error_fatal);
pnv_bmc_set_pnor(IPMI_BMC(obj), pnor);
dev = qdev_new(TYPE_IPMI_BMC_SIMULATOR);
qdev_realize(dev, NULL, &error_fatal);
pnv_bmc_set_pnor(IPMI_BMC(dev), pnor);
return IPMI_BMC(obj);
return IPMI_BMC(dev);
}
typedef struct ForeachArgs {

1
hw/ppc/ppc440_bamboo.c
View File

@ -24,6 +24,7 @@
#include "elf.h"
#include "hw/char/serial.h"
#include "hw/ppc/ppc.h"
#include "hw/pci-host/ppc4xx.h"
#include "sysemu/sysemu.h"
#include "sysemu/reset.h"
#include "hw/sysbus.h"

1
hw/ppc/ppc440_uc.c
View File

@ -14,6 +14,7 @@
#include "qemu/log.h"
#include "hw/irq.h"
#include "hw/ppc/ppc4xx.h"
#include "hw/pci-host/ppc4xx.h"
#include "hw/qdev-properties.h"
#include "hw/pci/pci.h"
#include "sysemu/reset.h"

1
hw/ppc/sam460ex.c
View File

@ -25,6 +25,7 @@
#include "elf.h"
#include "exec/memory.h"
#include "ppc440.h"
#include "hw/pci-host/ppc4xx.h"
#include "hw/block/flash.h"
#include "sysemu/sysemu.h"
#include "sysemu/reset.h"

3
hw/ppc/spapr_cpu_core.c
View File

@ -245,8 +245,7 @@ static void spapr_cpu_core_unrealize(DeviceState *dev)
* spapr_cpu_core_realize(), make sure we only unrealize
* vCPUs that have already been realized.
*/
if (object_property_get_bool(OBJECT(sc->threads[i]), "realized",
&error_abort)) {
if (qdev_is_realized(DEVICE(sc->threads[i]))) {
spapr_unrealize_vcpu(sc->threads[i], sc);
}
spapr_delete_vcpu(sc->threads[i]);

12
hw/ppc/trace-events
View File

@ -146,18 +146,6 @@ rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x"
rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
# ppc4xx_pci.c
ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
ppc4xx_pci_set_irq(int irq_num) "PCI irq %d"
# ppc440_pcix.c
ppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
ppc440_pcix_set_irq(int irq_num) "PCI irq %d"
ppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) "Added window %d of size=0x%" PRIx64 " to CPU=0x%" PRIx64
ppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia) "Added window %d of size=0x%x from CPU=0x%" PRIx64 " to PCI=0x%" PRIx64
ppc440_pcix_reg_read(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32
ppc440_pcix_reg_write(uint64_t addr, uint32_t val, uint32_t size) "addr 0x%" PRIx64 " = 0x%" PRIx32 " size 0x%" PRIx32
# ppc405_boards.c
opba_readb(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32
opba_writeb(uint64_t addr, uint64_t val) "addr 0x%" PRIx64 " = 0x%" PRIx64

2
hw/sparc/leon3.c
View File

@ -150,7 +150,7 @@ static void leon3_cpu_reset(void *opaque)
{
struct CPUResetData *info = (struct CPUResetData *) opaque;
int id = info->id;
ResetData *s = (ResetData *)DO_UPCAST(ResetData, info[id], info);
ResetData *s = container_of(info, ResetData, info[id]);
CPUState *cpu = CPU(s->info[id].cpu);
CPUSPARCState *env = cpu_env(cpu);

4
hw/tricore/tricore_testboard.c
View File

@ -89,9 +89,7 @@ static void tricore_testboard_init(MachineState *machine, int board_id)
memory_region_add_subregion(sysmem, 0xf0050000, pcp_data);
memory_region_add_subregion(sysmem, 0xf0060000, pcp_text);
test_dev = g_new(TriCoreTestDeviceState, 1);
object_initialize(test_dev, sizeof(TriCoreTestDeviceState),
TYPE_TRICORE_TESTDEVICE);
test_dev = TRICORE_TESTDEVICE(qdev_new(TYPE_TRICORE_TESTDEVICE));
memory_region_add_subregion(sysmem, 0xf0000000, &test_dev->iomem);

3
include/hw/acpi/cpu.h
View File

@ -12,6 +12,7 @@
#ifndef ACPI_CPU_H
#define ACPI_CPU_H
#include "qapi/qapi-types-acpi.h"
#include "hw/qdev-core.h"
#include "hw/acpi/acpi.h"
#include "hw/acpi/aml-build.h"
@ -19,7 +20,7 @@
#include "hw/hotplug.h"
typedef struct AcpiCpuStatus {
struct CPUState *cpu;
CPUState *cpu;
uint64_t arch_id;
bool is_inserting;
bool is_removing;

1
include/hw/acpi/ich9_tco.h
View File

@ -11,6 +11,7 @@
#define HW_ACPI_TCO_H
#include "exec/memory.h"
#include "migration/vmstate.h"
/* As per ICH9 spec, the internal timer has an error of ~0.6s on every tick */
#define TCO_TICK_NSEC 600000000LL

1
include/hw/acpi/memory_hotplug.h
View File

@ -1,6 +1,7 @@
#ifndef QEMU_HW_ACPI_MEMORY_HOTPLUG_H
#define QEMU_HW_ACPI_MEMORY_HOTPLUG_H
#include "qapi/qapi-types-acpi.h"
#include "hw/qdev-core.h"
#include "hw/acpi/acpi.h"
#include "hw/acpi/aml-build.h"

9
include/hw/i386/pc.h
View File

@ -12,9 +12,10 @@
#include "hw/hotplug.h"
#include "qom/object.h"
#include "hw/i386/sgx-epc.h"
#include "hw/firmware/smbios.h"
#include "hw/cxl/cxl.h"
#define MAX_IDE_BUS 2
/**
* PCMachineState:
* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
@ -35,6 +36,7 @@ typedef struct PCMachineState {
PFlashCFI01 *flash[2];
ISADevice *pcspk;
DeviceState *iommu;
BusState *idebus[MAX_IDE_BUS];
/* Configuration options: */
uint64_t max_ram_below_4g;
@ -149,8 +151,6 @@ extern int fd_bootchk;
void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
void pc_guest_info_init(PCMachineState *pcms);
#define PCI_HOST_PROP_RAM_MEM "ram-mem"
#define PCI_HOST_PROP_PCI_MEM "pci-mem"
#define PCI_HOST_PROP_SYSTEM_MEM "system-mem"
@ -180,7 +180,6 @@ void pc_basic_device_init(struct PCMachineState *pcms,
bool create_fdctrl,
uint32_t hpet_irqs);
void pc_cmos_init(PCMachineState *pcms,
BusState *ide0, BusState *ide1,
ISADevice *s);
void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
@ -192,8 +191,6 @@ void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
#define TYPE_PORT92 "port92"
/* pc_sysfw.c */
void pc_system_flash_create(PCMachineState *pcms);
void pc_system_flash_cleanup_unused(PCMachineState *pcms);
void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
bool pc_system_ovmf_table_find(const char *entry, uint8_t **data,
int *data_len);

3
include/hw/i386/x86.h
View File

@ -34,6 +34,8 @@ struct X86MachineClass {
bool save_tsc_khz;
/* use DMA capable linuxboot option rom */
bool fwcfg_dma_enabled;
/* CPU and apic information: */
bool apic_xrupt_override;
};
struct X86MachineState {
@ -57,7 +59,6 @@ struct X86MachineState {
uint64_t above_4g_mem_start;
/* CPU and apic information: */
bool apic_xrupt_override;
unsigned pci_irq_mask;
unsigned apic_id_limit;
uint16_t boot_cpus;

9
include/hw/ide.h
View File

@ -1,9 +0,0 @@
#ifndef HW_IDE_H
#define HW_IDE_H
#include "exec/memory.h"
/* ide/core.c */
void ide_drive_get(DriveInfo **hd, int max_bus);
#endif /* HW_IDE_H */

42
include/hw/ide/ide-bus.h Normal file
View File

@ -0,0 +1,42 @@
#ifndef HW_IDE_BUS_H
#define HW_IDE_BUS_H
#include "exec/ioport.h"
#include "hw/ide/ide-dev.h"
#include "hw/ide/ide-dma.h"
struct IDEBus {
BusState qbus;
IDEDevice *master;
IDEDevice *slave;
IDEState ifs[2];
QEMUBH *bh;
int bus_id;
int max_units;
IDEDMA *dma;
uint8_t unit;
uint8_t cmd;
qemu_irq irq; /* bus output */
int error_status;
uint8_t retry_unit;
int64_t retry_sector_num;
uint32_t retry_nsector;
PortioList portio_list;
PortioList portio2_list;
VMChangeStateEntry *vmstate;
};
#define TYPE_IDE_BUS "IDE"
OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS)
void ide_bus_init(IDEBus *idebus, size_t idebus_size, DeviceState *dev,
int bus_id, int max_units);
IDEDevice *ide_bus_create_drive(IDEBus *bus, int unit, DriveInfo *drive);
int ide_get_geometry(BusState *bus, int unit,
int16_t *cyls, int8_t *heads, int8_t *secs);
int ide_get_bios_chs_trans(BusState *bus, int unit);
#endif

184
include/hw/ide/ide-dev.h Normal file
View File

@ -0,0 +1,184 @@
/*
* ide device definitions
*
* Copyright (c) 2009 Gerd Hoffmann <kraxel@redhat.com>
*
* This code is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef IDE_DEV_H
#define IDE_DEV_H
#include "sysemu/dma.h"
#include "hw/qdev-properties.h"
#include "hw/block/block.h"
typedef struct IDEDevice IDEDevice;
typedef struct IDEState IDEState;
typedef struct IDEBus IDEBus;
typedef void EndTransferFunc(IDEState *);
#define MAX_IDE_DEVS 2
#define TYPE_IDE_DEVICE "ide-device"
OBJECT_DECLARE_TYPE(IDEDevice, IDEDeviceClass, IDE_DEVICE)
typedef enum { IDE_HD, IDE_CD, IDE_CFATA } IDEDriveKind;
struct unreported_events {
bool eject_request;
bool new_media;
};
enum ide_dma_cmd {
IDE_DMA_READ = 0,
IDE_DMA_WRITE,
IDE_DMA_TRIM,
IDE_DMA_ATAPI,
IDE_DMA__COUNT
};
/* NOTE: IDEState represents in fact one drive */
struct IDEState {
IDEBus *bus;
uint8_t unit;
/* ide config */
IDEDriveKind drive_kind;
int drive_heads, drive_sectors;
int cylinders, heads, sectors, chs_trans;
int64_t nb_sectors;
int mult_sectors;
int identify_set;
uint8_t identify_data[512];
int drive_serial;
char drive_serial_str[21];
char drive_model_str[41];
uint64_t wwn;
/* ide regs */
uint8_t feature;
uint8_t error;
uint32_t nsector;
uint8_t sector;
uint8_t lcyl;
uint8_t hcyl;
/* other part of tf for lba48 support */
uint8_t hob_feature;
uint8_t hob_nsector;
uint8_t hob_sector;
uint8_t hob_lcyl;
uint8_t hob_hcyl;
uint8_t select;
uint8_t status;
bool io8;
bool reset_reverts;
/* set for lba48 access */
uint8_t lba48;
BlockBackend *blk;
char version[9];
/* ATAPI specific */
struct unreported_events events;
uint8_t sense_key;
uint8_t asc;
bool tray_open;
bool tray_locked;
uint8_t cdrom_changed;
int packet_transfer_size;
int elementary_transfer_size;
int32_t io_buffer_index;
int lba;
int cd_sector_size;
int atapi_dma; /* true if dma is requested for the packet cmd */
BlockAcctCookie acct;
BlockAIOCB *pio_aiocb;
QEMUIOVector qiov;
QLIST_HEAD(, IDEBufferedRequest) buffered_requests;
/* ATA DMA state */
uint64_t io_buffer_offset;
int32_t io_buffer_size;
QEMUSGList sg;
/* PIO transfer handling */
int req_nb_sectors; /* number of sectors per interrupt */
EndTransferFunc *end_transfer_func;
uint8_t *data_ptr;
uint8_t *data_end;
uint8_t *io_buffer;
/* PIO save/restore */
int32_t io_buffer_total_len;
int32_t cur_io_buffer_offset;
int32_t cur_io_buffer_len;
uint8_t end_transfer_fn_idx;
QEMUTimer *sector_write_timer; /* only used for win2k install hack */
uint32_t irq_count; /* counts IRQs when using win2k install hack */
/* CF-ATA extended error */
uint8_t ext_error;
/* CF-ATA metadata storage */
uint32_t mdata_size;
uint8_t *mdata_storage;
int media_changed;
enum ide_dma_cmd dma_cmd;
/* SMART */
uint8_t smart_enabled;
uint8_t smart_autosave;
int smart_errors;
uint8_t smart_selftest_count;
uint8_t *smart_selftest_data;
/* AHCI */
int ncq_queues;
};
struct IDEDeviceClass {
DeviceClass parent_class;
void (*realize)(IDEDevice *dev, Error **errp);
};
struct IDEDevice {
DeviceState qdev;
uint32_t unit;
BlockConf conf;
int chs_trans;
char *version;
char *serial;
char *model;
uint64_t wwn;
/*
* 0x0000 - rotation rate not reported
* 0x0001 - non-rotating medium (SSD)
* 0x0002-0x0400 - reserved
* 0x0401-0xffe - rotations per minute
* 0xffff - reserved
*/
uint16_t rotation_rate;
};
typedef struct IDEDrive {
IDEDevice dev;
} IDEDrive;
#define DEFINE_IDE_DEV_PROPERTIES() \
DEFINE_BLOCK_PROPERTIES(IDEDrive, dev.conf), \
DEFINE_BLOCK_ERROR_PROPERTIES(IDEDrive, dev.conf), \
DEFINE_PROP_STRING("ver", IDEDrive, dev.version), \
DEFINE_PROP_UINT64("wwn", IDEDrive, dev.wwn, 0), \
DEFINE_PROP_STRING("serial", IDEDrive, dev.serial),\
DEFINE_PROP_STRING("model", IDEDrive, dev.model)
void ide_dev_initfn(IDEDevice *dev, IDEDriveKind kind, Error **errp);
void ide_drive_get(DriveInfo **hd, int max_bus);
#endif

37
include/hw/ide/ide-dma.h Normal file
View File

@ -0,0 +1,37 @@
#ifndef HW_IDE_DMA_H
#define HW_IDE_DMA_H
#include "block/aio.h"
#include "qemu/iov.h"
typedef struct IDEState IDEState;
typedef struct IDEDMAOps IDEDMAOps;
typedef struct IDEDMA IDEDMA;
typedef void DMAStartFunc(const IDEDMA *, IDEState *, BlockCompletionFunc *);
typedef void DMAVoidFunc(const IDEDMA *);
typedef int DMAIntFunc(const IDEDMA *, bool);
typedef int32_t DMAInt32Func(const IDEDMA *, int32_t len);
typedef void DMAu32Func(const IDEDMA *, uint32_t);
typedef void DMAStopFunc(const IDEDMA *, bool);
struct IDEDMAOps {
DMAStartFunc *start_dma;
DMAVoidFunc *pio_transfer;
DMAInt32Func *prepare_buf;
DMAu32Func *commit_buf;
DMAIntFunc *rw_buf;
DMAVoidFunc *restart;
DMAVoidFunc *restart_dma;
DMAStopFunc *set_inactive;
DMAVoidFunc *cmd_done;
DMAVoidFunc *reset;
};
struct IDEDMA {
const IDEDMAOps *ops;
QEMUIOVector qiov;
BlockAIOCB *aiocb;
};
#endif

211
include/hw/ide/internal.h
View File

@ -4,27 +4,13 @@
/*
* QEMU IDE Emulation -- internal header file
* only files in hw/ide/ are supposed to include this file.
* non-internal declarations are in hw/ide.h
* non-internal declarations are in hw/include/ide-*.h
*/
#include "hw/ide.h"
#include "sysemu/dma.h"
#include "hw/block/block.h"
#include "exec/ioport.h"
#include "hw/ide/ide-bus.h"
/* debug IDE devices */
#define USE_DMA_CDROM
#include "qom/object.h"
typedef struct IDEDevice IDEDevice;
typedef struct IDEState IDEState;
typedef struct IDEDMA IDEDMA;
typedef struct IDEDMAOps IDEDMAOps;
#define TYPE_IDE_BUS "IDE"
OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS)
#define MAX_IDE_DEVS 2
/* Device/Head ("select") Register */
#define ATA_DEV_SELECT 0x10
@ -328,30 +314,6 @@ OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS)
#define SMART_DISABLE 0xd9
#define SMART_STATUS 0xda
typedef enum { IDE_HD, IDE_CD, IDE_CFATA } IDEDriveKind;
typedef void EndTransferFunc(IDEState *);
typedef void DMAStartFunc(const IDEDMA *, IDEState *, BlockCompletionFunc *);
typedef void DMAVoidFunc(const IDEDMA *);
typedef int DMAIntFunc(const IDEDMA *, bool);
typedef int32_t DMAInt32Func(const IDEDMA *, int32_t len);
typedef void DMAu32Func(const IDEDMA *, uint32_t);
typedef void DMAStopFunc(const IDEDMA *, bool);
struct unreported_events {
bool eject_request;
bool new_media;
};
enum ide_dma_cmd {
IDE_DMA_READ = 0,
IDE_DMA_WRITE,
IDE_DMA_TRIM,
IDE_DMA_ATAPI,
IDE_DMA__COUNT
};
extern const char *IDE_DMA_CMD_lookup[IDE_DMA__COUNT];
extern const MemoryRegionPortio ide_portio_list[];
@ -369,166 +331,6 @@ typedef struct IDEBufferedRequest {
bool orphaned;
} IDEBufferedRequest;
/* NOTE: IDEState represents in fact one drive */
struct IDEState {
IDEBus *bus;
uint8_t unit;
/* ide config */
IDEDriveKind drive_kind;
int drive_heads, drive_sectors;
int cylinders, heads, sectors, chs_trans;
int64_t nb_sectors;
int mult_sectors;
int identify_set;
uint8_t identify_data[512];
int drive_serial;
char drive_serial_str[21];
char drive_model_str[41];
uint64_t wwn;
/* ide regs */
uint8_t feature;
uint8_t error;
uint32_t nsector;
uint8_t sector;
uint8_t lcyl;
uint8_t hcyl;
/* other part of tf for lba48 support */
uint8_t hob_feature;
uint8_t hob_nsector;
uint8_t hob_sector;
uint8_t hob_lcyl;
uint8_t hob_hcyl;
uint8_t select;
uint8_t status;
bool io8;
bool reset_reverts;
/* set for lba48 access */
uint8_t lba48;
BlockBackend *blk;
char version[9];
/* ATAPI specific */
struct unreported_events events;
uint8_t sense_key;
uint8_t asc;
bool tray_open;
bool tray_locked;
uint8_t cdrom_changed;
int packet_transfer_size;
int elementary_transfer_size;
int32_t io_buffer_index;
int lba;
int cd_sector_size;
int atapi_dma; /* true if dma is requested for the packet cmd */
BlockAcctCookie acct;
BlockAIOCB *pio_aiocb;
QEMUIOVector qiov;
QLIST_HEAD(, IDEBufferedRequest) buffered_requests;
/* ATA DMA state */
uint64_t io_buffer_offset;
int32_t io_buffer_size;
QEMUSGList sg;
/* PIO transfer handling */
int req_nb_sectors; /* number of sectors per interrupt */
EndTransferFunc *end_transfer_func;
uint8_t *data_ptr;
uint8_t *data_end;
uint8_t *io_buffer;
/* PIO save/restore */
int32_t io_buffer_total_len;
int32_t cur_io_buffer_offset;
int32_t cur_io_buffer_len;
uint8_t end_transfer_fn_idx;
QEMUTimer *sector_write_timer; /* only used for win2k install hack */
uint32_t irq_count; /* counts IRQs when using win2k install hack */
/* CF-ATA extended error */
uint8_t ext_error;
/* CF-ATA metadata storage */
uint32_t mdata_size;
uint8_t *mdata_storage;
int media_changed;
enum ide_dma_cmd dma_cmd;
/* SMART */
uint8_t smart_enabled;
uint8_t smart_autosave;
int smart_errors;
uint8_t smart_selftest_count;
uint8_t *smart_selftest_data;
/* AHCI */
int ncq_queues;
};
struct IDEDMAOps {
DMAStartFunc *start_dma;
DMAVoidFunc *pio_transfer;
DMAInt32Func *prepare_buf;
DMAu32Func *commit_buf;
DMAIntFunc *rw_buf;
DMAVoidFunc *restart;
DMAVoidFunc *restart_dma;
DMAStopFunc *set_inactive;
DMAVoidFunc *cmd_done;
DMAVoidFunc *reset;
};
struct IDEDMA {
const struct IDEDMAOps *ops;
QEMUIOVector qiov;
BlockAIOCB *aiocb;
};
struct IDEBus {
BusState qbus;
IDEDevice *master;
IDEDevice *slave;
IDEState ifs[2];
QEMUBH *bh;
int bus_id;
int max_units;
IDEDMA *dma;
uint8_t unit;
uint8_t cmd;
qemu_irq irq; /* bus output */
int error_status;
uint8_t retry_unit;
int64_t retry_sector_num;
uint32_t retry_nsector;
PortioList portio_list;
PortioList portio2_list;
VMChangeStateEntry *vmstate;
};
#define TYPE_IDE_DEVICE "ide-device"
OBJECT_DECLARE_TYPE(IDEDevice, IDEDeviceClass, IDE_DEVICE)
struct IDEDeviceClass {
DeviceClass parent_class;
void (*realize)(IDEDevice *dev, Error **errp);
};
struct IDEDevice {
DeviceState qdev;
uint32_t unit;
BlockConf conf;
int chs_trans;
char *version;
char *serial;
char *model;
uint64_t wwn;
/*
* 0x0000 - rotation rate not reported
* 0x0001 - non-rotating medium (SSD)
* 0x0002-0x0400 - reserved
* 0x0401-0xffe - rotations per minute
* 0xffff - reserved
*/
uint16_t rotation_rate;
};
/* These are used for the error_status field of IDEBus */
#define IDE_RETRY_MASK 0xf8
#define IDE_RETRY_DMA 0x08
@ -645,15 +447,6 @@ void ide_cancel_dma_sync(IDEState *s);
void ide_atapi_cmd(IDEState *s);
void ide_atapi_cmd_reply_end(IDEState *s);
/* hw/ide/qdev.c */
void ide_bus_init(IDEBus *idebus, size_t idebus_size, DeviceState *dev,
int bus_id, int max_units);
IDEDevice *ide_bus_create_drive(IDEBus *bus, int unit, DriveInfo *drive);
int ide_get_geometry(BusState *bus, int unit,
int16_t *cyls, int8_t *heads, int8_t *secs);
int ide_get_bios_chs_trans(BusState *bus, int unit);
int ide_handle_rw_error(IDEState *s, int error, int op);
#endif /* HW_IDE_INTERNAL_H */

2
include/hw/ide/pci.h
View File

@ -1,7 +1,7 @@
#ifndef HW_IDE_PCI_H
#define HW_IDE_PCI_H
#include "hw/ide/internal.h"
#include "hw/ide/ide-bus.h"
#include "hw/pci/pci_device.h"
#include "qom/object.h"

1
include/hw/input/i8042.h
View File

@ -89,7 +89,6 @@ struct MMIOKBDState {
void i8042_isa_mouse_fake_event(ISAKBDState *isa);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out);
static inline bool i8042_present(void)
{

17
include/hw/pci-host/ppc4xx.h Normal file
View File

@ -0,0 +1,17 @@
/*
* QEMU PowerPC 4xx PCI-host definitions
*
* Copyright (c) 2018-2023 BALATON Zoltan
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef HW_PCIHOST_PPC4XX_H
#define HW_PCIHOST_PPC4XX_H
#define TYPE_PPC4xx_HOST_BRIDGE "ppc4xx-host-bridge"
#define TYPE_PPC4xx_PCI_HOST "ppc4xx-pci-host"
#define TYPE_PPC440_PCIX_HOST "ppc440-pcix-host"
#define TYPE_PPC460EX_PCIE_HOST "ppc460ex-pcie-host"
#endif

5
include/hw/ppc/ppc4xx.h
View File

@ -29,11 +29,6 @@
#include "exec/memory.h"
#include "hw/sysbus.h"
#define TYPE_PPC4xx_HOST_BRIDGE "ppc4xx-host-bridge"
#define TYPE_PPC4xx_PCI_HOST "ppc4xx-pci-host"
#define TYPE_PPC440_PCIX_HOST "ppc440-pcix-host"
#define TYPE_PPC460EX_PCIE_HOST "ppc460ex-pcie-host"
/*
* Generic DCR device
*/

2
include/hw/sysbus.h
View File

@ -83,8 +83,6 @@ void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr addr);
void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr,
int priority);
void sysbus_mmio_unmap(SysBusDevice *dev, int n);
void sysbus_add_io(SysBusDevice *dev, hwaddr addr,
MemoryRegion *mem);
MemoryRegion *sysbus_address_space(SysBusDevice *dev);
bool sysbus_realize(SysBusDevice *dev, Error **errp);

3
include/hw/tricore/tricore_testdevice.h
View File

@ -25,12 +25,9 @@
OBJECT_CHECK(TriCoreTestDeviceState, (obj), TYPE_TRICORE_TESTDEVICE)
typedef struct {
/* <private> */
SysBusDevice parent_obj;
/* <public> */
MemoryRegion iomem;
} TriCoreTestDeviceState;
#endif