陳韋任 (Wei-Ren Chen) 6801038bc5 target-mips: fix wrong microMIPS opcode encoding ...

While reading microMIPS decoding, I found a possible wrong opcode
encoding. According to [1] page 166, the bits 13..12 for MULTU is
0x01 rather than 0x00. Please review, thanks.

[1] MIPS Architecture for Programmers VolumeIV-e: The MIPS DSP
    Application-Specific Extension to the microMIPS32 Architecture

Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

2012-11-15 14:48:16 +01:00

..

cpu-qom.h

…

cpu.c

…

cpu.h

Merge remote-tracking branch 'afaerber/qom-cpu' into staging

2012-11-01 11:12:32 -05:00

dsp_helper.c

target-mips: use ULL for 64 bit constants

2012-11-05 08:02:37 +01:00

helper.c

target-mips: Add ASE DSP resources access check

2012-10-31 20:24:06 +01:00

helper.h

target-mips: implement unaligned loads using TCG

2012-10-31 22:20:47 +01:00

lmi_helper.c

target-mips: Implement Loongson Multimedia Instructions

2012-09-19 21:40:48 +02:00

machine.c

…

Makefile.objs

target-mips: Add ASE DSP internal functions

2012-10-31 20:24:05 +01:00

mips-defs.h

…

op_helper.c

target-mips: don't flush extra TLB on permissions upgrade

2012-10-31 22:20:49 +01:00

TODO

target-mips: Change TODO file

2012-10-31 21:37:24 +01:00

translate_init.c

target-mips: Add ASE DSP processors

2012-10-31 21:37:20 +01:00

translate.c

target-mips: fix wrong microMIPS opcode encoding

2012-11-15 14:48:16 +01:00