qemu/target
Richard Henderson d55a3211e2 target/alpha: Use tcg_gen_movcond_i64 in gen_fold_mzero
The setcond + neg + and sequence is a complex method of
performing a conditional move.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-08-24 11:22:42 -07:00
..
alpha target/alpha: Use tcg_gen_movcond_i64 in gen_fold_mzero 2023-08-24 11:22:42 -07:00
arm sysemu/hvf: Use vaddr for hvf_arch_[insert|remove]_hw_breakpoint 2023-08-24 11:21:40 -07:00
avr target/avr: Fix handling of interrupts above 33. 2023-07-08 07:24:38 +03:00
cris other architectures: spelling fixes 2023-07-25 17:14:07 +03:00
hexagon target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
hppa target/hppa: Move iaoq registers and thus reduce generated code size 2023-08-04 00:02:56 +02:00
i386 sysemu/hvf: Use vaddr for hvf_arch_[insert|remove]_hw_breakpoint 2023-08-24 11:21:40 -07:00
loongarch target/loongarch: Split fcc register to fcc0-7 in gdbstub 2023-08-24 11:17:59 +08:00
m68k target/m68k: Use tcg_gen_deposit_i32 in gen_partset_reg 2023-08-24 11:22:42 -07:00
microblaze other architectures: spelling fixes 2023-07-25 17:14:07 +03:00
mips mips: Report an error when KVM_VM_MIPS_VZ is unavailable 2023-08-22 17:31:03 +01:00
nios2 target/nios2: Fix semihost lseek offset computation 2023-08-01 23:52:23 +02:00
openrisc target/openrisc: Set EPCR to next PC on FPE exceptions 2023-07-31 22:01:03 +01:00
ppc sysemu/kvm: Use vaddr for kvm_arch_[insert|remove]_hw_breakpoint 2023-08-24 11:21:35 -07:00
riscv include/exec: Replace target_ulong with abi_ptr in cpu_[st|ld]*() 2023-08-24 11:21:46 -07:00
rx include/exec: Replace target_ulong with abi_ptr in cpu_[st|ld]*() 2023-08-24 11:21:46 -07:00
s390x sysemu/kvm: Use vaddr for kvm_arch_[insert|remove]_hw_breakpoint 2023-08-24 11:21:35 -07:00
sh4 target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
sparc trivial-patches 25-07-2023 2023-07-25 16:30:52 +01:00
tricore target/tricore: Rename tricore_feature 2023-07-25 17:18:51 +03:00
xtensa target/xtensa: Assert that interrupt level is within bounds 2023-07-06 13:26:43 +01:00
Kconfig
meson.build