c2077e2ca0
A conventional PCI bus does not support config space accesses above the standard 256 byte configuration space. PCIe-to-PCI bridges are not permitted to forward transactions if the extended register address field is non-zero and must handle it as an unsupported request (PCIe bridge spec rev 1.0, 4.1.3, 4.1.4). Therefore, we should not support extended config space if there is a conventional bus anywhere on the path to a device. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
---|---|---|
.. | ||
Makefile.objs | ||
msi.c | ||
msix.c | ||
pci_bridge.c | ||
pci_host.c | ||
pci-stub.c | ||
pci.c | ||
pcie_aer.c | ||
pcie_host.c | ||
pcie_port.c | ||
pcie.c | ||
shpc.c | ||
slotid_cap.c | ||
trace-events |