PCI: PCIe access should always be little endian
PCIe busses are always little endian, so set the endianness of the memory region to little endian rather than native such that operations work as expected on big endian targets. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
parent
b81b948ecc
commit
a6c242aaf5
@ -81,7 +81,7 @@ static uint64_t pcie_mmcfg_data_read(void *opaque,
|
||||
static const MemoryRegionOps pcie_mmcfg_ops = {
|
||||
.read = pcie_mmcfg_data_read,
|
||||
.write = pcie_mmcfg_data_write,
|
||||
.endianness = DEVICE_NATIVE_ENDIAN,
|
||||
.endianness = DEVICE_LITTLE_ENDIAN,
|
||||
};
|
||||
|
||||
static void pcie_host_init(Object *obj)
|
||||
|
Loading…
x
Reference in New Issue
Block a user