qemu/hw/riscv
Philippe Mathieu-Daudé 7d5b0d6864 bulk: Remove pointless QOM casts
Mechanical change running Coccinelle spatch with content
generated from the qom-cast-macro-clean-cocci-gen.py added
in the previous commit.

Suggested-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230601093452.38972-3-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-06-05 20:48:34 +02:00
..
boot.c hw/riscv/boot.c: make riscv_load_initrd() static 2023-02-16 07:55:37 -08:00
Kconfig hw/riscv/virt: Enable basic ACPI infrastructure 2023-03-06 11:35:04 -08:00
meson.build hw/riscv/virt: Enable basic ACPI infrastructure 2023-03-06 11:35:04 -08:00
microchip_pfsoc.c hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel() 2023-02-16 07:55:30 -08:00
numa.c hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix() 2023-01-20 10:14:14 +10:00
opentitan.c *: Add missing includes of qemu/error-report.h 2023-03-22 15:06:57 +00:00
riscv_hart.c hw/riscv: hart: Add a new 'resetvec' property 2020-09-09 15:54:18 -07:00
shakti_c.c *: Add missing includes of qemu/error-report.h 2023-03-22 15:06:57 +00:00
sifive_e.c hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel() 2023-02-16 07:55:30 -08:00
sifive_u.c hw/riscv: Move the dtb load bits outside of create_fdt() 2023-03-01 17:19:14 -08:00
spike.c hw/riscv: Add signature dump function for spike to run ACT tests 2023-05-05 10:49:50 +10:00
virt-acpi-build.c *: Add missing includes of qemu/error-report.h 2023-03-22 15:06:57 +00:00
virt.c bulk: Remove pointless QOM casts 2023-06-05 20:48:34 +02:00