Peter Maydell c983fe6cf1 target-arm: Convert cp15 c3 register ... Convert the cp15 c3 register (MMU domain access control or MPU write buffer control). NB that this is horribly underdecoded for modern cores (should be crn=3,crm=0, opc1=0,opc2=0) but this change preserves the existing QEMU behaviour. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2012-06-20 12:05:44 +00:00
..
arm-semi.c	build: move obj-TARGET-y variables to nested Makefile.objs	2012-06-07 07:17:36 +02:00
cpu-qom.h	target-arm: Add register_cp_regs_for_features()	2012-06-20 12:02:54 +00:00
cpu.c	target-arm: Convert performance monitor registers	2012-06-20 12:05:17 +00:00
cpu.h	target-arm: Remove old cpu_arm_set_cp_io infrastructure	2012-06-20 12:02:01 +00:00
helper.c	target-arm: Convert cp15 c3 register	2012-06-20 12:05:44 +00:00
helper.h	target-arm: Convert TEECR, TEEHBR to new scheme	2012-06-20 12:04:08 +00:00
iwmmxt_helper.c	target-arm: Don't overuse CPUState	2012-03-14 22:20:24 +01:00
machine.c	arm: Add dummy support for co-processor 15's secure config register	2012-01-13 17:25:08 +00:00
Makefile.objs	build: move other target-*/ objects to nested Makefile.objs	2012-06-07 09:21:11 +02:00
neon_helper.c	target-arm: When setting FPSCR.QC, don't clear other FPSCR bits	2012-05-10 12:56:08 +00:00
op_addsub.h	Correct spelling of licensed	2011-07-23 11:26:12 -05:00
op_helper.c	target-arm: initial coprocessor register framework	2012-06-20 12:01:02 +00:00
translate.c	target-arm: Convert performance monitor registers	2012-06-20 12:05:17 +00:00