arm: Add dummy support for co-processor 15's secure config register
Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -116,6 +116,7 @@ typedef struct CPUARMState {
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uint32_t c1_sys; /* System control register. */
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uint32_t c1_coproc; /* Coprocessor access register. */
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uint32_t c1_xscaleauxcr; /* XScale auxiliary control register. */
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uint32_t c1_scr; /* secure config register. */
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uint32_t c2_base0; /* MMU translation table base 0. */
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uint32_t c2_base1; /* MMU translation table base 1. */
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uint32_t c2_control; /* MMU translation table base control. */
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@ -452,7 +453,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
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#define cpu_signal_handler cpu_arm_signal_handler
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#define cpu_list arm_cpu_list
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#define CPU_SAVE_VERSION 5
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#define CPU_SAVE_VERSION 6
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/* MMU modes definitions */
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#define MMU_MODE0_SUFFIX _kernel
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@ -1440,6 +1440,11 @@ void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val)
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}
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goto bad_reg;
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case 1: /* System configuration. */
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if (arm_feature(env, ARM_FEATURE_V7)
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&& op1 == 0 && crm == 1 && op2 == 0) {
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env->cp15.c1_scr = val;
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break;
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}
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if (arm_feature(env, ARM_FEATURE_OMAPCP))
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op2 = 0;
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switch (op2) {
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@ -1908,6 +1913,10 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn)
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goto bad_reg;
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}
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case 1: /* System configuration. */
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if (arm_feature(env, ARM_FEATURE_V7)
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&& op1 == 0 && crm == 1 && op2 == 0) {
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return env->cp15.c1_scr;
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}
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if (arm_feature(env, ARM_FEATURE_OMAPCP))
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op2 = 0;
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switch (op2) {
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@ -26,6 +26,7 @@ void cpu_save(QEMUFile *f, void *opaque)
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qemu_put_be32(f, env->cp15.c1_sys);
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qemu_put_be32(f, env->cp15.c1_coproc);
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qemu_put_be32(f, env->cp15.c1_xscaleauxcr);
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qemu_put_be32(f, env->cp15.c1_scr);
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qemu_put_be32(f, env->cp15.c2_base0);
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qemu_put_be32(f, env->cp15.c2_base1);
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qemu_put_be32(f, env->cp15.c2_control);
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@ -143,6 +144,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
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env->cp15.c1_sys = qemu_get_be32(f);
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env->cp15.c1_coproc = qemu_get_be32(f);
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env->cp15.c1_xscaleauxcr = qemu_get_be32(f);
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env->cp15.c1_scr = qemu_get_be32(f);
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env->cp15.c2_base0 = qemu_get_be32(f);
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env->cp15.c2_base1 = qemu_get_be32(f);
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env->cp15.c2_control = qemu_get_be32(f);
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