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qemu/target/arm
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Peter Maydell a65dabf71a target/arm: Fix Rt/Rt2 in ESR_ELx for copro traps from AArch32 to 64 
When a coprocessor instruction in an  AArch32 guest traps to AArch32
Hyp mode, the syndrome register (HSR) includes Rt and Rt2 fields
which are simply copies of the Rt and Rt2 fields from the trapped
instruction.  However, if the instruction is trapped from AArch32 to
an AArch64 higher exception level, the Rt and Rt2 fields in the
syndrome register (ESR_ELx) must be the AArch64 view of the register.
This makes a difference if the AArch32 guest was in a mode other than
User or System and it was using r13 or r14, or if it was in FIQ mode
and using r8-r14.

We don't know at translate time which AArch32 CPU mode we are in, so
we leave the values we generate in our prototype syndrome register
value at translate time as the raw Rt/Rt2 from the instruction, and
instead correct them to the AArch64 view when we find we need to take
an exception from AArch32 to AArch64 with one of these syndrome
values.

Fixes: https://bugs.launchpad.net/qemu/+bug/1879587
Reported-by: Julien Freche <julien@bedrocksystems.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200804193903.31240-1-peter.maydell@linaro.org
2020-08-05 17:31:51 +01:00
..
a32-uncond.decode target/arm: Convert Unallocated memory hint 2019-09-05 13:23:03 +01:00
a32.decode target/arm: Convert SVC 2019-09-05 13:23:03 +01:00
arch_dump.c target/arm: Add isar_feature_aa32_vfp_simd 2020-02-28 16:14:57 +00:00
arm_ldst.h target/arm: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
arm-powerctl.c arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on() 2019-12-20 14:03:00 +00:00
arm-powerctl.h
arm-semi.c target/arm/arm-semi: Don't let the guest close stdin/stdout/stderr 2020-01-30 16:02:01 +00:00
cpu64.c hw/arm/virt: Enable MTE via a machine property 2020-07-20 11:35:15 +01:00
cpu_tcg.c target/arm: Use correct GDB XML for M-profile cores 2020-05-14 15:03:08 +01:00
cpu-param.h target/arm: Don't use a TLB for ARMMMUIdx_Stage2 2020-05-04 10:32:46 +01:00
cpu-qom.h target/arm: Make cpu_register() available for other files 2020-04-30 15:35:41 +01:00
cpu.c hw/arm/virt: Enable MTE via a machine property 2020-07-20 11:35:15 +01:00
cpu.h target/arm: kvm: Handle misconfigured dabt injection 2020-07-03 16:59:42 +01:00
crypto_helper.c target/arm: Split helper_crypto_sm3tt 2020-06-05 17:23:09 +01:00
debug_helper.c target/arm: Stop assuming DBGDIDR always exists 2020-02-21 16:07:01 +00:00
gdbstub64.c gdbstub: extend GByteArray to read register helpers 2020-03-17 17:38:38 +00:00
gdbstub.c target/arm: Use correct GDB XML for M-profile cores 2020-05-14 15:03:08 +01:00
helper-a64.c target/arm: Simplify DC_ZVA 2020-06-26 14:31:12 +01:00
helper-a64.h target/arm: Add helper_mte_check_zva 2020-06-26 14:31:12 +01:00
helper-sve.h target/arm: Add mte helpers for sve scatter/gather memory ops 2020-06-26 14:31:12 +01:00
helper.c target/arm: Fix Rt/Rt2 in ESR_ELx for copro traps from AArch32 to 64 2020-08-05 17:31:51 +01:00
helper.h target/arm: Implement LDG, STG, ST2G instructions 2020-06-26 14:31:12 +01:00
idau.h
internals.h target/arm: Always pass cacheattr to get_phys_addr 2020-06-26 14:31:12 +01:00
iwmmxt_helper.c
kvm32.c target/arm: kvm: Handle misconfigured dabt injection 2020-07-03 16:59:42 +01:00
kvm64.c target/arm: kvm: Handle misconfigured dabt injection 2020-07-03 16:59:42 +01:00
kvm_arm.h target/arm: kvm: Handle misconfigured dabt injection 2020-07-03 16:59:42 +01:00
kvm-consts.h
kvm-stub.c
kvm.c target/arm: kvm: Handle misconfigured dabt injection 2020-07-03 16:59:42 +01:00
m_helper.c target/arm: Always pass cacheattr to get_phys_addr 2020-06-26 14:31:12 +01:00
machine.c target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfp 2020-02-28 16:14:57 +00:00
Makefile.objs target/arm: Implement the IRG instruction 2020-06-26 14:31:12 +01:00
monitor.c error: Eliminate error_propagate() with Coccinelle, part 1 2020-07-10 15:18:08 +02:00
mte_helper.c target/arm: Improve IMPDEF algorithm for IRG 2020-07-27 16:12:11 +01:00
neon_helper.c target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree 2020-05-14 15:03:09 +01:00
neon-dp.decode target/arm: Convert Neon VTRN to decodetree 2020-06-23 11:39:47 +01:00
neon-ls.decode target/arm: Convert Neon 'load/store single structure' to decodetree 2020-05-04 12:57:56 +01:00
neon-shared.decode target/arm: Convert VFM[AS]L (scalar) to decodetree 2020-05-04 12:57:56 +01:00
op_addsub.h
op_helper.c target/arm: Implement LDG, STG, ST2G instructions 2020-06-26 14:31:12 +01:00
pauth_helper.c target/arm: Fix AddPAC error indication 2020-08-03 17:55:03 +01:00
psci.c sysemu: Split sysemu/runstate.h off sysemu/sysemu.h 2019-08-16 13:37:36 +02:00
sve_helper.c target/arm: Complete TBI clearing for user-only for SVE 2020-06-26 14:31:12 +01:00
sve.decode
t16.decode target/arm: Convert T16, long branches 2019-09-05 13:23:04 +01:00
t32.decode target/arm: Use a non-overlapping group for misc control 2020-06-09 09:21:19 -07:00
tlb_helper.c target/arm: Cache the Tagged bit for a page in MemTxAttrs 2020-06-26 14:31:12 +01:00
trace-events
translate-a64.c target/arm: Fix decode of LDRA[AB] instructions 2020-08-04 16:40:19 +01:00
translate-a64.h target/arm: Fix temp double-free in sve ldr/str 2020-07-03 16:59:43 +01:00
translate-neon.inc.c target/arm: Move some functions used only in translate-neon.inc.c to that file 2020-06-23 11:39:47 +01:00
translate-sve.c target/arm: Fix mtedesc for do_mem_zpz 2020-07-13 14:36:07 +01:00
translate-vfp.inc.c target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXIT 2020-06-26 14:31:12 +01:00
translate.c target/arm: Add DISAS_UPDATE_NOCHAIN 2020-06-26 14:31:12 +01:00
translate.h target/arm: Implement the LDGM, STGM, STZGM instructions 2020-06-26 14:31:12 +01:00
vec_helper.c target/arm: Convert aes and sm4 to gvec helpers 2020-06-05 17:23:09 +01:00
vec_internal.h target/arm: Convert aes and sm4 to gvec helpers 2020-06-05 17:23:09 +01:00
vfp_helper.c softfloat: Name compare relation enum 2020-05-19 08:41:45 -07:00
vfp-uncond.decode target/arm: Split VMINMAXNM decode 2020-02-28 16:14:57 +00:00
vfp.decode target/arm: Split VFM decode 2020-02-28 16:14:57 +00:00