qemu/target/arm
Alex Bennée 0336cbf853 cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap
While the vargs approach was flexible the original MTTCG ended up
having munge the bits to a bitmap so the data could be used in
deferred work helpers. Instead of hiding that in cputlb we push the
change to the API to make it take a bitmap of MMU indexes instead.

For ARM some the resulting flushes end up being quite long so to aid
readability I've tended to move the index shifting to a new line so
all the bits being or-ed together line up nicely, for example:

    tlb_flush_page_by_mmuidx(other_cs, pageaddr,
                             (1 << ARMMMUIdx_S1SE1) |
                             (1 << ARMMMUIdx_S1SE0));

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
[AT: SPARC parts only]
Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
[PM: ARM parts only]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-24 10:32:46 +00:00
..
Makefile.objs
arch_dump.c
arm-powerctl.c
arm-powerctl.h
arm-semi.c
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2017-02-07 18:29:59 +00:00
cpu-qom.h
cpu.c target-arm: Enable vPMU support under TCG mode 2017-02-10 17:40:28 +00:00
cpu.h target-arm: Add support for PMU register PMINTENSET_EL1 2017-02-10 17:40:28 +00:00
cpu64.c target-arm: Enable EL2 feature bit on A53 and A57 2017-01-20 11:15:10 +00:00
crypto_helper.c
gdbstub.c
gdbstub64.c
helper-a64.c target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper-a64.h target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper.c cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap 2017-02-24 10:32:46 +00:00
helper.h target-arm: Use clz opcode 2017-01-10 08:06:11 -08:00
internals.h arm: Correctly handle watchpoints for BE32 CPUs 2017-02-07 18:29:59 +00:00
iwmmxt_helper.c
kvm-consts.h arm: add trailing ; after MISMATCH_CHECK 2017-02-01 03:37:18 +02:00
kvm-stub.c
kvm.c
kvm32.c
kvm64.c
kvm_arm.h
machine.c armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR 2017-01-27 15:29:08 +00:00
monitor.c
neon_helper.c
op_addsub.h
op_helper.c tcg: drop global lock during TCG code execution 2017-02-24 10:32:45 +00:00
psci.c target/arm/psci.c: If EL2 implemented, start CPUs in EL2 2017-01-20 11:15:10 +00:00
trace-events
translate-a64.c target/arm: A32, T32: Create Instruction Syndromes for Data Aborts 2017-02-07 18:30:00 +00:00
translate.c target/arm: A32, T32: Create Instruction Syndromes for Data Aborts 2017-02-07 18:30:00 +00:00
translate.h target/arm: A32, T32: Create Instruction Syndromes for Data Aborts 2017-02-07 18:30:00 +00:00