Bin Meng edcc4e4090 target/riscv: machine: Sort the .subsections ...

Move the codes around so that the order of .subsections matches
the one they are referenced in vmstate_riscv_cpu.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20211030030606.32297-1-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

2021-11-17 19:18:22 +10:00

..

insn_trans

target/riscv: Support pointer masking for RISC-V for i/c/f/d/a types of instructions

2021-10-28 14:39:23 +10:00

arch_dump.c

…

bitmanip_helper.c

target/riscv: Add rev8 instruction, removing grev/grevi

2021-10-07 08:41:33 +10:00

cpu_bits.h

target/riscv: remove force HS exception

2021-10-29 16:54:45 +10:00

cpu_helper.c

target/riscv: Make riscv_cpu_tlb_fill sysemu only

2021-11-02 07:00:52 -04:00

cpu_user.h

…

cpu-param.h

…

cpu.c

target/riscv: Make riscv_cpu_tlb_fill sysemu only

2021-11-02 07:00:52 -04:00

cpu.h

target/riscv: remove force HS exception

2021-10-29 16:54:45 +10:00

csr.c

target/riscv: Support CSRs required for RISC-V PM extension except for the h-mode

2021-10-28 14:39:23 +10:00

fpu_helper.c

target/riscv: change the api for RVF/RVD fmin/fmax

2021-10-29 16:56:12 +10:00

gdbstub.c

target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl

2021-10-22 07:47:51 +10:00

helper.h

target/riscv: Add rev8 instruction, removing grev/grevi

2021-10-07 08:41:33 +10:00

insn16.decode

…

insn32.decode

target/riscv: Remove RVB (replaced by Zb[abcs])

2021-10-07 08:41:33 +10:00

instmap.h

…

internals.h

…

Kconfig

meson: Introduce target-specific Kconfig

2021-07-09 18:21:34 +02:00

machine.c

target/riscv: machine: Sort the .subsections

2021-11-17 19:18:22 +10:00

meson.build

target/riscv: rvb: generalized reverse

2021-06-08 09:59:45 +10:00

monitor.c

target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl

2021-10-22 07:47:51 +10:00

op_helper.c

target/riscv: Reorg csr instructions

2021-09-01 11:59:12 +10:00

pmp.c

target/riscv: pmp: Fix some typos

2021-07-15 08:56:00 +10:00

pmp.h

…

trace-events

…

trace.h

…

translate.c

target/riscv: Implement address masking functions required for RISC-V Pointer Masking extension

2021-10-28 14:39:23 +10:00

vector_helper.c

…