mirror of https://gitlab.com/qemu-project/qemu
94e7787939
This commit implements the single-byte mode of the SMBus. Each Nuvoton SoC has 16 System Management Bus (SMBus). These buses compliant with SMBus and I2C protocol. This patch implements the single-byte mode of the SMBus. In this mode, the user sends or receives a byte each time. The SMBus device transmits it to the underlying i2c device and sends an interrupt back to the QEMU guest. Reviewed-by: Doug Evans<dje@google.com> Reviewed-by: Tyrong Ting<kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Corey Minyard <cminyard@mvista.com> Message-id: 20210210220426.3577804-2-wuhaotsh@google.com Acked-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| .. | ||
| allwinner-a10.h | ||
| allwinner-h3.h | ||
| armsse.h | ||
| armv7m.h | ||
| aspeed.h | ||
| aspeed_soc.h | ||
| bcm2835_peripherals.h | ||
| bcm2836.h | ||
| boot.h | ||
| digic.h | ||
| exynos4210.h | ||
| fdt.h | ||
| fsl-imx6.h | ||
| fsl-imx6ul.h | ||
| fsl-imx7.h | ||
| fsl-imx25.h | ||
| fsl-imx31.h | ||
| linux-boot-if.h | ||
| msf2-soc.h | ||
| npcm7xx.h | ||
| nrf51.h | ||
| nrf51_soc.h | ||
| omap.h | ||
| primecell.h | ||
| pxa.h | ||
| raspi_platform.h | ||
| sharpsl.h | ||
| smmu-common.h | ||
| smmuv3.h | ||
| soc_dma.h | ||
| stm32f205_soc.h | ||
| stm32f405_soc.h | ||
| sysbus-fdt.h | ||
| virt.h | ||
| xlnx-versal.h | ||
| xlnx-zynqmp.h | ||