hw/arm/raspi: fix CPRMAN base address
The CPRMAN (clock controller) was mapped at the watchdog/power manager address. It was also split into two unimplemented peripherals (CM and A2W) but this is really the same one, as shown by this extract of the Raspberry Pi 3 Linux device tree: watchdog@7e100000 { compatible = "brcm,bcm2835-pm\0brcm,bcm2835-pm-wdt"; [...] reg = <0x7e100000 0x114 0x7e00a000 0x24>; [...] }; [...] cprman@7e101000 { compatible = "brcm,bcm2835-cprman"; [...] reg = <0x7e101000 0x2000>; [...] }; Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Luc Michel <luc@lmichel.fr> Tested-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -354,8 +354,8 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
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create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
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create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
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create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
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create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
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create_unimp(s, &s->powermgt, "bcm2835-powermgt", PM_OFFSET, 0x114);
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create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x2000);
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create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
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create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
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create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
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@ -47,8 +47,8 @@ struct BCM2835PeripheralState {
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BCM2835MphiState mphi;
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UnimplementedDeviceState txp;
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UnimplementedDeviceState armtmr;
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UnimplementedDeviceState powermgt;
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UnimplementedDeviceState cprman;
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UnimplementedDeviceState a2w;
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PL011State uart0;
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BCM2835AuxState aux;
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BCM2835FBState fb;
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@ -45,9 +45,8 @@
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#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 (SP804) */
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#define ARMCTRL_0_SBM_OFFSET (ARM_OFFSET + 0x800) /* User 0 (ARM) Semaphores
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* Doorbells & Mailboxes */
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#define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
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#define CM_OFFSET 0x101000 /* Clock Management */
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#define A2W_OFFSET 0x102000 /* Reset controller */
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#define PM_OFFSET 0x100000 /* Power Management */
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#define CPRMAN_OFFSET 0x101000 /* Clock Management */
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#define AVS_OFFSET 0x103000 /* Audio Video Standard */
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#define RNG_OFFSET 0x104000
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#define GPIO_OFFSET 0x200000
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