qemu/target
Daniel Henrique Barboza bbef914044 target/riscv: create finalize_features() for KVM
To turn cbom_blocksize and cboz_blocksize into class properties we need
KVM specific changes.

KVM is creating its own version of these options with a customized
setter() that prevents users from picking an invalid value during init()
time. This comes at the cost of duplicating each option that KVM
supports. This will keep happening for each new shared option KVM
implements in the future.

We can avoid that by using the same property TCG uses and adding
specific KVM handling during finalize() time, like TCG already does with
riscv_tcg_cpu_finalize_features(). To do that, the common CPU property
offers a way of knowing if an option was user set or not, sparing us
from doing unneeded syscalls.

riscv_kvm_cpu_finalize_features() is then created using the same
KVMScratch CPU we already use during init() time, since finalize() time
is still too early to use the official KVM CPU for it. cbom_blocksize
and cboz_blocksize are then handled during finalize() in the same way
they're handled by their KVM specific setter.

With this change we can proceed with the blocksize changes in the common
code without breaking the KVM driver.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
tested-by tags added, rebased with Alistair's riscv-to-apply.next.
Message-ID: <20240112140201.127083-2-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-02-09 11:08:04 +10:00
..
alpha target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero 2024-02-03 23:43:50 +00:00
arm tests/tcg: Fix multiarch/gdbstub/prot-none.py 2024-02-03 13:31:45 +00:00
avr include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
cris include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
hexagon include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
hppa include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
i386 include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
loongarch include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
m68k target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond 2024-02-03 23:43:50 +00:00
microblaze include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
mips include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
nios2 include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
openrisc include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
ppc target/ppc/cpu-models: Rename power5+ and power7+ for new QOM naming rules 2024-02-05 14:21:21 +01:00
riscv target/riscv: create finalize_features() for KVM 2024-02-09 11:08:04 +10:00
rx include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
s390x tcg: Introduce TCG_COND_TST{EQ,NE} 2024-02-08 16:08:42 +00:00
sh4 include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
sparc target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc 2024-02-03 23:43:50 +00:00
tricore include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
xtensa include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
Kconfig
meson.build target: Make qemu_target_page_mask() available for *-user 2024-01-29 21:04:10 +10:00
target-common.c target: Make qemu_target_page_mask() available for *-user 2024-01-29 21:04:10 +10:00