qemu/target/openrisc
Richard Henderson 119065574d hw/core: Constify TCGCPUOps
We no longer have any runtime modifications to this struct,
so declare them all const.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20210227232519.222663-3-richard.henderson@linaro.org>
2021-05-26 15:33:59 -07:00
..
cpu-param.h
cpu.c hw/core: Constify TCGCPUOps 2021-05-26 15:33:59 -07:00
cpu.h target/openrisc: Move pic_cpu code into CPU object proper 2020-12-15 12:04:30 +00:00
disas.c meson: target 2020-08-21 06:30:35 -04:00
exception_helper.c
exception.c
exception.h Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
fpu_helper.c softfloat: Name compare relation enum 2020-05-19 08:41:45 -07:00
gdbstub.c gdbstub: extend GByteArray to read register helpers 2020-03-17 17:38:38 +00:00
helper.h target/openrisc: Implement unordered fp comparisons 2019-09-04 12:57:59 -07:00
insns.decode target/openrisc: Implement l.adrp 2019-09-04 12:59:00 -07:00
interrupt_helper.c
interrupt.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
machine.c migration: Replace migration's JSON writer by the general one 2020-12-19 10:39:16 +01:00
meson.build meson: target 2020-08-21 06:30:35 -04:00
mmu.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
sys_helper.c Do not include sysemu/sysemu.h if it's not really necessary 2021-05-02 17:24:50 +02:00
translate.c target/openrisc: fix icount handling for timer instructions 2021-04-01 10:37:20 +02:00