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target/openrisc: Implement l.adrp

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This was added to the 1.3 spec.

Reviewed-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2019-08-25 17:31:30 -07:00
parent a465772eea
commit 3e0e41ef33
3 changed files with 16 additions and 0 deletions
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1
target/openrisc/disas.c
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@ -98,6 +98,7 @@ INSN(sw, "%d(r%d), r%d", a->i, a->a, a->b)
INSN(sb, "%d(r%d), r%d", a->i, a->a, a->b)
INSN(sh, "%d(r%d), r%d", a->i, a->a, a->b)
INSN(nop, "")
INSN(adrp, "r%d, %d", a->d, a->i)
INSN(addi, "r%d, r%d, %d", a->d, a->a, a->i)
INSN(addic, "r%d, r%d, %d", a->d, a->a, a->i)
INSN(muli, "r%d, r%d, %d", a->d, a->a, a->i)

2
target/openrisc/insns.decode
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@ -102,6 +102,8 @@ l_maci 010011 ----- a:5 i:s16
l_movhi 000110 d:5 ----0 k:16
l_macrc 000110 d:5 ----1 00000000 00000000
l_adrp 000010 d:5 i:s21
####
# Arithmetic Instructions
####

13
target/openrisc/translate.c
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@ -799,6 +799,19 @@ static bool trans_l_nop(DisasContext *dc, arg_l_nop *a)
return true;
}
static bool trans_l_adrp(DisasContext *dc, arg_l_adrp *a)
{
if (!check_v1_3(dc)) {
return false;
}
check_r0_write(dc, a->d);
tcg_gen_movi_i32(cpu_R(dc, a->d),
(dc->base.pc_next & TARGET_PAGE_MASK) +
((target_long)a->i << TARGET_PAGE_BITS));
return true;
}
static bool trans_l_addi(DisasContext *dc, arg_rri *a)
{
TCGv t0;