qemu/hw/riscv
Daniel Henrique Barboza b9a65476cb hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd()
riscv_load_initrd() returns the initrd end addr while also writing a
'start' var to mark the addr start. These informations are being used
just to write the initrd FDT node. Every existing caller of
riscv_load_initrd() is writing the FDT in the same manner.

We can simplify things by writing the FDT inside riscv_load_initrd(),
sparing callers from having to manage start/end addrs to write the FDT
themselves.

An 'if (fdt)' check is already inserted at the end of the function
because we'll end up using it later on with other boards that doesn´t
have a FDT.

Cc: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230102115241.25733-7-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-01-20 10:14:13 +10:00
..
boot.c hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() 2023-01-20 10:14:13 +10:00
Kconfig hw/riscv: Sort machines Kconfig options in alphabetical order 2023-01-06 10:42:55 +10:00
meson.build hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines 2021-07-20 15:32:49 +02:00
microchip_pfsoc.c hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() 2023-01-20 10:14:13 +10:00
numa.c hw: Do not include qemu/log.h if it is not necessary 2021-05-02 17:24:50 +02:00
opentitan.c hw/riscv: opentitan: Drop "hartid-base" and "priority-base" initialization 2023-01-06 10:42:55 +10:00
riscv_hart.c hw/riscv: hart: Add a new 'resetvec' property 2020-09-09 15:54:18 -07:00
shakti_c.c hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec() 2022-09-07 09:18:33 +02:00
sifive_e.c hw/riscv: Make CPU config error handling generous (sifive_e/u/opentitan) 2022-05-24 10:38:50 +10:00
sifive_u.c hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() 2023-01-20 10:14:13 +10:00
spike.c hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() 2023-01-20 10:14:13 +10:00
virt.c hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() 2023-01-20 10:14:13 +10:00