Christophe Lyon b6c63b9891 target-arm: Fix unsigned VRSHL.s8 and .s16 right shifts by type width ... Fix handling of unsigned VRSHL.s8 and .s16 right shifts by the type width. Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>		2011-02-20 17:43:01 +01:00
..
cpu.h	arm: drop unused irq-related part of CPUARMState	2011-02-11 01:10:13 +01:00
exec.h	move cpu_pc_from_tb to target-*/exec.h	2010-07-03 09:48:12 +03:00
helper.c	target-arm: Use standard FPSCR for Neon half-precision operations	2011-02-10 18:28:30 +01:00
helpers.h	target-arm: Move Neon VZIP to helper functions	2011-02-20 17:31:53 +01:00
iwmmxt_helper.c	Update to a hopefully more future proof FSF address	2009-07-16 20:47:01 +00:00
machine.c	Save/restore ARMv6 MMU state	2009-07-31 13:19:39 +01:00
neon_helper.c	target-arm: Fix unsigned VRSHL.s8 and .s16 right shifts by type width	2011-02-20 17:43:01 +01:00
op_addsub.h	target-arm: fix addsub/subadd implementation	2010-07-01 23:45:29 +02:00
op_helper.c	Set the right overflow bit for neon 32 and 64 bit saturating add/sub.	2011-02-04 20:57:41 +01:00
translate.c	target-arm: Move Neon VZIP to helper functions	2011-02-20 17:31:53 +01:00