qemu/hw/pci-bridge
Igor Mammedov b1fbf24259 remove DEC 21154 PCI bridge
Code has not been used practically since its inception (2004)
  f2aa58c6f4 UniNorth PCI bridge support
or maybe even earlier, but it was consuming contributors time
as QEMU was being rewritten.
Drop it for now. Whomever would like to actually
use the thing, can make sure it actually works/reintroduce
it back when there is a user.

PS:
I've stumbled upon this when replacing PCIDeviceClass::is_bridge
field with QOM cast to PCI_BRIDGE type. Unused DEC 21154
was the only one trying to use the field with plain PCIDevice.
It's not worth keeping the field around for the sake of the code
that was commented out 'forever'.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20221129101341.185621-2-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-12-21 07:32:24 -05:00
..
cxl_downstream.c pci-bridge/cxl_downstream: Add a CXL switch downstream port 2022-06-16 12:54:57 -04:00
cxl_root_port.c pci: Convert child classes of TYPE_PCIE_ROOT_PORT to 3-phase reset 2022-12-16 15:59:07 +00:00
cxl_upstream.c hw/pci-bridge/cxl-upstream: Add a CDAT table access DOE 2022-11-07 13:12:19 -05:00
gen_pcie_root_port.c hw/pcie-root-port: Fix hotplug for PCI devices requiring IO 2021-08-03 16:31:07 -04:00
i82801b11.c nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
ioh3420.c
Kconfig hw/cxl/rp: Add a root port 2022-05-13 06:13:36 -04:00
meson.build remove DEC 21154 PCI bridge 2022-12-21 07:32:24 -05:00
pci_bridge_dev.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
pci_expander_bridge_stubs.c pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup. 2022-06-09 19:32:49 -04:00
pci_expander_bridge.c pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup. 2022-06-09 19:32:49 -04:00
pcie_pci_bridge.c Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
pcie_root_port.c pci: Convert TYPE_PCIE_ROOT_PORT to 3-phase reset 2022-12-16 15:59:07 +00:00
simba.c
xio3130_downstream.c pci: expose TYPE_XIO3130_DOWNSTREAM name 2022-03-06 05:08:23 -05:00
xio3130_upstream.c pci-bridge/xio3130_upstream: Fix error handling 2022-03-06 05:08:23 -05:00