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b1e5336a98
qemu/target/arm
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Peter Maydell b1e5336a98 target/arm: Implement v8M VLLDM and VLSTM 
For v8M the instructions VLLDM and VLSTM support lazy saving
and restoring of the secure floating-point registers. Even
if the floating point extension is not implemented, these
instructions must act as NOPs in Secure state, so they can
be used as part of the secure-to-nonsecure call sequence.

Fixes: https://bugs.launchpad.net/qemu/+bug/1768295
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180503105730.5958-1-peter.maydell@linaro.org
2018-05-04 18:05:51 +01:00
..
arch_dump.c target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers 2018-01-25 11:45:29 +00:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2017-02-07 18:29:59 +00:00
arm-powerctl.c target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-powerctl.h target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-semi.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
cpu64.c target/arm: Make 'any' CPU just an alias for 'max' 2018-03-09 17:09:44 +00:00
cpu-qom.h target/arm: Add "-cpu max" support 2018-03-09 17:09:44 +00:00
cpu.c target/arm: Add pre-EL change hooks 2018-04-26 11:04:39 +01:00
cpu.h target/arm: Make PMOVSCLR and PMUSERENR 64 bits wide 2018-04-26 11:04:39 +01:00
crypto_helper.c target/arm: implement SM4 instructions 2018-02-09 10:40:28 +00:00
gdbstub64.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
gdbstub.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
helper-a64.c arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16 2018-03-01 11:13:59 +00:00
helper-a64.h arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16 2018-03-01 11:13:59 +00:00
helper.c target/arm: Correct MPUIR privilege level in register_cp_regs_for_features() conditional case 2018-05-04 18:05:50 +01:00
helper.h target/arm: Honour MDCR_EL2.TDE when routing exceptions due to BKPT/BRK 2018-03-23 18:26:46 +00:00
idau.h target/arm: Define an IDAU interface 2018-03-02 11:03:45 +00:00
internals.h target/arm: Add pre-EL change hooks 2018-04-26 11:04:39 +01:00
iwmmxt_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
kvm32.c target/arm: Query host CPU features on-demand at instance init 2018-03-09 17:09:44 +00:00
kvm64.c target/arm: Query host CPU features on-demand at instance init 2018-03-09 17:09:44 +00:00
kvm_arm.h target/arm: Query host CPU features on-demand at instance init 2018-03-09 17:09:44 +00:00
kvm-consts.h arm: add trailing ; after MISMATCH_CHECK 2017-02-01 03:37:18 +02:00
kvm-stub.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
kvm.c target/arm: Move definition of 'host' cpu type into cpu.c 2018-03-09 17:09:44 +00:00
machine.c target/arm: Implement v8M MSPLIM and PSPLIM registers 2018-02-15 18:29:49 +00:00
Makefile.objs target/arm: Decode aa64 armv8.1 scalar three same extra 2018-03-02 11:03:45 +00:00
monitor.c qapi: Empty out qapi-schema.json 2018-03-02 13:45:50 -06:00
neon_helper.c target/*/cpu.h: remove softfloat.h 2018-02-21 10:20:24 +00:00
op_addsub.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
op_helper.c target/arm: Add pre-EL change hooks 2018-04-26 11:04:39 +01:00
psci.c fix WFI/WFE length in syndrome register 2017-10-31 11:50:50 +00:00
trace-events trace-events: fix code style: print 0x before hex numbers 2017-08-01 12:13:07 +01:00
translate-a64.c target/arm: Tidy condition in disas_simd_two_reg_misc 2018-05-04 18:05:51 +01:00
translate.c target/arm: Implement v8M VLLDM and VLSTM 2018-05-04 18:05:51 +01:00
translate.h tcg: Introduce tcg_set_insn_start_param 2018-04-10 13:02:26 +01:00
vec_helper.c target/arm: Decode aa64 armv8.3 fcmla 2018-03-02 11:03:45 +00:00