target/arm: Make 'any' CPU just an alias for 'max'
Now we have a working '-cpu max', the linux-user-only 'any' CPU is pretty much the same thing, so implement it that way. For the moment we don't add any of the extra feature bits to the system-emulation "max", because we don't set the ID register bits we would need to to advertise those features as present. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180308130626.12393-5-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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@ -970,9 +970,19 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
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ObjectClass *oc;
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char *typename;
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char **cpuname;
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const char *cpunamestr;
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cpuname = g_strsplit(cpu_model, ",", 1);
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typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpuname[0]);
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cpunamestr = cpuname[0];
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#ifdef CONFIG_USER_ONLY
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/* For backwards compatibility usermode emulation allows "-cpu any",
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* which has the same semantics as "-cpu max".
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*/
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if (!strcmp(cpunamestr, "any")) {
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cpunamestr = "max";
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}
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#endif
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typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpunamestr);
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oc = object_class_by_name(typename);
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g_strfreev(cpuname);
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g_free(typename);
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@ -1716,29 +1726,23 @@ static void arm_max_initfn(Object *obj)
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kvm_arm_set_cpu_features_from_host(cpu);
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} else {
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cortex_a15_initfn(obj);
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/* In future we might add feature bits here even if the
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* real-world A15 doesn't implement them.
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*/
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}
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}
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#endif
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#ifdef CONFIG_USER_ONLY
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static void arm_any_initfn(Object *obj)
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{
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ARMCPU *cpu = ARM_CPU(obj);
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set_feature(&cpu->env, ARM_FEATURE_V8);
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set_feature(&cpu->env, ARM_FEATURE_VFP4);
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set_feature(&cpu->env, ARM_FEATURE_NEON);
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set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
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set_feature(&cpu->env, ARM_FEATURE_V8_AES);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
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set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
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set_feature(&cpu->env, ARM_FEATURE_CRC);
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set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
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set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
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cpu->midr = 0xffffffff;
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/* We don't set these in system emulation mode for the moment,
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* since we don't correctly set the ID registers to advertise them,
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*/
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set_feature(&cpu->env, ARM_FEATURE_V8);
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set_feature(&cpu->env, ARM_FEATURE_VFP4);
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set_feature(&cpu->env, ARM_FEATURE_NEON);
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set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
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set_feature(&cpu->env, ARM_FEATURE_V8_AES);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
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set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
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set_feature(&cpu->env, ARM_FEATURE_CRC);
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set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
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set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
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#endif
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}
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}
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#endif
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@ -1794,7 +1798,7 @@ static const ARMCPUInfo arm_cpus[] = {
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{ .name = "max", .initfn = arm_max_initfn },
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#endif
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#ifdef CONFIG_USER_ONLY
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{ .name = "any", .initfn = arm_any_initfn },
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{ .name = "any", .initfn = arm_max_initfn },
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#endif
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#endif
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{ .name = NULL }
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@ -228,38 +228,38 @@ static void aarch64_max_initfn(Object *obj)
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kvm_arm_set_cpu_features_from_host(cpu);
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} else {
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aarch64_a57_initfn(obj);
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/* In future we might add feature bits here even if the
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* real-world A57 doesn't implement them.
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#ifdef CONFIG_USER_ONLY
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/* We don't set these in system emulation mode for the moment,
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* since we don't correctly set the ID registers to advertise them,
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* and in some cases they're only available in AArch64 and not AArch32,
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* whereas the architecture requires them to be present in both if
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* present in either.
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*/
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set_feature(&cpu->env, ARM_FEATURE_V8);
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set_feature(&cpu->env, ARM_FEATURE_VFP4);
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set_feature(&cpu->env, ARM_FEATURE_NEON);
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set_feature(&cpu->env, ARM_FEATURE_AARCH64);
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set_feature(&cpu->env, ARM_FEATURE_V8_AES);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA512);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA3);
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set_feature(&cpu->env, ARM_FEATURE_V8_SM3);
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set_feature(&cpu->env, ARM_FEATURE_V8_SM4);
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set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
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set_feature(&cpu->env, ARM_FEATURE_CRC);
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set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
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set_feature(&cpu->env, ARM_FEATURE_V8_FP16);
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set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
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/* For usermode -cpu max we can use a larger and more efficient DCZ
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* blocksize since we don't have to follow what the hardware does.
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*/
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cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
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cpu->dcz_blocksize = 7; /* 512 bytes */
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#endif
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}
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}
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#ifdef CONFIG_USER_ONLY
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static void aarch64_any_initfn(Object *obj)
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{
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ARMCPU *cpu = ARM_CPU(obj);
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set_feature(&cpu->env, ARM_FEATURE_V8);
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set_feature(&cpu->env, ARM_FEATURE_VFP4);
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set_feature(&cpu->env, ARM_FEATURE_NEON);
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set_feature(&cpu->env, ARM_FEATURE_AARCH64);
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set_feature(&cpu->env, ARM_FEATURE_V8_AES);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA512);
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set_feature(&cpu->env, ARM_FEATURE_V8_SHA3);
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set_feature(&cpu->env, ARM_FEATURE_V8_SM3);
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set_feature(&cpu->env, ARM_FEATURE_V8_SM4);
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set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
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set_feature(&cpu->env, ARM_FEATURE_CRC);
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set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
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set_feature(&cpu->env, ARM_FEATURE_V8_FP16);
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set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
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cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
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cpu->dcz_blocksize = 7; /* 512 bytes */
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}
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#endif
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typedef struct ARMCPUInfo {
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const char *name;
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void (*initfn)(Object *obj);
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@ -270,9 +270,6 @@ static const ARMCPUInfo aarch64_cpus[] = {
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{ .name = "cortex-a57", .initfn = aarch64_a57_initfn },
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{ .name = "cortex-a53", .initfn = aarch64_a53_initfn },
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{ .name = "max", .initfn = aarch64_max_initfn },
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#ifdef CONFIG_USER_ONLY
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{ .name = "any", .initfn = aarch64_any_initfn },
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#endif
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{ .name = NULL }
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};
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