| .. |
|
a32-uncond.decode
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
a32.decode
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
arch_dump.c
|
target/arm: add spaces around operator
|
2020-11-10 11:03:47 +00:00 |
|
arm_ldst.h
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
arm-powerctl.c
|
arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on()
|
2019-12-20 14:03:00 +00:00 |
|
arm-powerctl.h
|
target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset()
|
2019-02-28 11:03:04 +00:00 |
|
cpu64.c
|
target/arm: Use object_property_add_bool for "sve" property
|
2021-01-19 14:38:51 +00:00 |
|
cpu_tcg.c
|
target/arm: Implement Cortex-M55 model
|
2021-01-08 15:13:38 +00:00 |
|
cpu-param.h
|
target/arm: add MMU stage 1 for Secure EL2
|
2021-01-19 14:38:51 +00:00 |
|
cpu-qom.h
|
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
|
2020-09-18 14:12:32 -04:00 |
|
cpu.c
|
target/arm: remove redundant tests
|
2021-01-19 14:38:51 +00:00 |
|
cpu.h
|
target/arm: secure stage 2 translation regime
|
2021-01-19 14:38:52 +00:00 |
|
crypto_helper.c
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
debug_helper.c
|
target/arm: Stop assuming DBGDIDR always exists
|
2020-02-21 16:07:01 +00:00 |
|
gdbstub64.c
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
gdbstub.c
|
target/arm: use official org.gnu.gdb.aarch64.sve layout for registers
|
2021-01-18 10:05:06 +00:00 |
|
helper-a64.c
|
target/arm: use arm_is_el2_enabled() where applicable
|
2021-01-19 14:38:51 +00:00 |
|
helper-a64.h
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
helper-sve.h
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
helper.c
|
target/arm: secure stage 2 translation regime
|
2021-01-19 14:38:52 +00:00 |
|
helper.h
|
target/arm: Fix neon VTBL/VTBX for len > 1
|
2020-11-10 11:03:48 +00:00 |
|
idau.h
|
Use DECLARE_*CHECKER* macros
|
2020-09-09 09:27:09 -04:00 |
|
internals.h
|
target/arm: secure stage 2 translation regime
|
2021-01-19 14:38:52 +00:00 |
|
iwmmxt_helper.c
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
kvm64.c
|
hw/arm/virt: Implement kvm-steal-time
|
2020-10-08 15:24:32 +01:00 |
|
kvm_arm.h
|
hw/arm/virt: Implement kvm-steal-time
|
2020-10-08 15:24:32 +01:00 |
|
kvm-consts.h
|
target/arm: Remove no-longer-reachable 32-bit KVM code
|
2020-09-14 14:23:19 +01:00 |
|
kvm-stub.c
|
Include qemu-common.h exactly where needed
|
2019-06-12 13:20:20 +02:00 |
|
kvm.c
|
hw/arm/virt: Implement kvm-steal-time
|
2020-10-08 15:24:32 +01:00 |
|
m_helper.c
|
semihosting: Change common-semi API to be architecture-independent
|
2021-01-18 10:05:06 +00:00 |
|
m-nocp.decode
|
target/arm: Implement new v8.1M VLLDM and VLSTM encodings
|
2020-12-10 11:44:56 +00:00 |
|
machine.c
|
migration: Replace migration's JSON writer by the general one
|
2020-12-19 10:39:16 +01:00 |
|
meson.build
|
semihosting: Move ARM semihosting code to shared directories
|
2021-01-18 10:05:06 +00:00 |
|
monitor.c
|
target/arm: Add cpu properties to control pauth
|
2021-01-19 14:38:51 +00:00 |
|
mte_helper.c
|
target/arm: Fix reported EL for mte_check_fail
|
2020-10-20 16:12:00 +01:00 |
|
neon_helper.c
|
target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree
|
2020-05-14 15:03:09 +01:00 |
|
neon-dp.decode
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
neon-ls.decode
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
neon-shared.decode
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
op_addsub.h
|
|
|
|
op_helper.c
|
target/arm: add 64-bit S-EL2 to EL exception table
|
2021-01-19 14:38:51 +00:00 |
|
pauth_helper.c
|
target/arm: Implement an IMPDEF pauth algorithm
|
2021-01-19 14:38:51 +00:00 |
|
psci.c
|
sysemu: Split sysemu/runstate.h off sysemu/sysemu.h
|
2019-08-16 13:37:36 +02:00 |
|
sve_helper.c
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
sve.decode
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
t16.decode
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
t32.decode
|
target/arm: Implement M-profile "minimal RAS implementation"
|
2020-12-10 11:44:56 +00:00 |
|
tlb_helper.c
|
target/arm: Cache the Tagged bit for a page in MemTxAttrs
|
2020-06-26 14:31:12 +01:00 |
|
trace-events
|
trace-events: Shorten file names in comments
|
2019-03-22 16:18:07 +00:00 |
|
trace.h
|
trace: switch position of headers to what Meson requires
|
2020-08-21 06:18:24 -04:00 |
|
translate-a64.c
|
target/arm: add MMU stage 1 for Secure EL2
|
2021-01-19 14:38:51 +00:00 |
|
translate-a64.h
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
translate-neon.c.inc
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
translate-sve.c
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
translate-vfp.c.inc
|
target/arm: Implement FPCXT_NS fp system register
|
2021-01-08 15:13:38 +00:00 |
|
translate.c
|
target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns
|
2021-01-12 21:19:02 +00:00 |
|
translate.h
|
target/arm: Rearrange {sve,fp}_check_access assert
|
2020-08-28 10:02:47 +01:00 |
|
vec_helper.c
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
vec_internal.h
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
vfp_helper.c
|
target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension
|
2020-10-20 16:12:01 +01:00 |
|
vfp-uncond.decode
|
arm tcg cpus: Fix Lesser GPL version number
|
2020-11-15 16:42:14 +01:00 |
|
vfp.decode
|
target/arm: Implement VLDR/VSTR system register
|
2020-12-10 11:44:55 +00:00 |
b1a10c868f