qemu/target
LIU Zhiwei a60ce58fd9 target/riscv: Support Zama16b extension
Zama16b is the property that misaligned load/stores/atomics within
a naturally aligned 16-byte region are atomic.

According to the specification, Zama16b applies only to AMOs, loads
and stores defined in the base ISAs, and loads and stores of no more
than XLEN bits defined in the F, D, and Q extensions. Thus it should
not apply to zacas or RVC instructions.

For an instruction in that set, if all accessed bytes lie within 16B granule,
the instruction will not raise an exception for reasons of address alignment,
and the instruction will give rise to only one memory operation for the
purposes of RVWMO—i.e., it will execute atomically.

Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240709113652.1239-6-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-07-18 12:00:42 +10:00
..
alpha target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
arm target/arm: Convert PMULL to decodetree 2024-07-11 11:41:34 +01:00
avr target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
cris target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
hexagon target/hexagon: idef-parser simplify predicate init 2024-06-08 17:49:36 -07:00
hppa target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
i386 target/i386/tcg: save current task state before loading new one 2024-07-16 18:18:25 +02:00
loongarch target/loongarch: Fix cpu_reset set wrong CSR_CRMD 2024-07-12 09:41:18 +08:00
m68k target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
microblaze target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
mips target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
openrisc target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
ppc target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
riscv target/riscv: Support Zama16b extension 2024-07-18 12:00:42 +10:00
rx target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
s390x target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
sh4 target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
sparc target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
tricore accel/tcg: Make cpu_exec_interrupt hook mandatory 2024-07-16 20:04:08 +02:00
xtensa target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
Kconfig meson: make target endianneess available to Kconfig 2024-05-03 15:47:47 +02:00
meson.build exec: Expose 'target_page.h' API to user emulation 2024-04-26 15:28:11 +02:00