qemu/hw/riscv
Philippe Mathieu-Daudé 4bf46af78b hw/riscv: Use the IEC binary prefix definitions
It eases code review, unit is explicit.

Patch generated using:

  $ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/

and modified manually.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Michael Clark <mjc@sifive.com>
Message-Id: <20180625124238.25339-17-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-02 15:41:13 +02:00
..
Makefile.objs RISC-V Build Infrastructure 2018-03-07 08:30:28 +13:00
riscv_hart.c RISC-V: Remove unused class definitions 2018-05-06 10:39:38 +12:00
riscv_htif.c hw: Do not include "exec/address-spaces.h" if it is not necessary 2018-06-01 14:15:10 +02:00
sifive_clint.c RISC-V: Replace hardcoded constants with enum values 2018-05-06 10:39:38 +12:00
sifive_e.c RISC-V: Mark ROM read-only after copying in code 2018-05-06 10:54:21 +12:00
sifive_plic.c SiFive RISC-V PLIC Block 2018-03-07 08:30:28 +13:00
sifive_prci.c SiFive RISC-V PRCI Block 2018-03-07 08:30:28 +13:00
sifive_test.c SiFive RISC-V Test Finisher 2018-03-07 08:30:28 +13:00
sifive_u.c RISC-V: Mark ROM read-only after copying in code 2018-05-06 10:54:21 +12:00
sifive_uart.c SiFive RISC-V UART Device 2018-03-07 08:30:28 +13:00
spike.c RISC-V: Mark ROM read-only after copying in code 2018-05-06 10:54:21 +12:00
virt.c hw/riscv: Use the IEC binary prefix definitions 2018-07-02 15:41:13 +02:00