Peter Maydell 5bddf92e68 hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping ... On some boards, SCC config register CFG0 bit 0 controls whether parts of the board memory map are remapped. Support this with: * a device property scc-cfg0 so the board can specify the initial value of the CFG0 register * an outbound GPIO line which tracks bit 0 and which the board can wire up to provide the remapping Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210504120912.23094-3-peter.maydell@linaro.org		2021-05-10 17:21:54 +01:00
..
macio	macio: wire macio GPIOs to OpenPIC using sysbus IRQs	2021-01-13 12:21:21 +00:00
a9scu.h
allwinner-cpucfg.h
allwinner-h3-ccu.h
allwinner-h3-dramc.h
allwinner-h3-sysctrl.h
allwinner-sid.h
arm11scu.h
arm_integrator_debug.h	arm: Update infocenter.arm.com URLs	2021-02-11 11:50:14 +00:00
armsse-cpu-pwrctrl.h	hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block	2021-03-08 17:20:02 +00:00
armsse-cpuid.h	hw/arm/mps2: Update old infocenter.arm.com URLs	2021-03-08 11:54:16 +00:00
armsse-mhu.h	hw/arm/mps2: Update old infocenter.arm.com URLs	2021-03-08 11:54:16 +00:00
aspeed_hace.h	hw: Model ASPEED's Hash and Crypto Engine	2021-05-01 10:03:51 +02:00
aspeed_lpc.h	hw/misc: Model KCS devices in the Aspeed LPC controller	2021-03-09 12:01:28 +01:00
aspeed_scu.h
aspeed_sdmc.h
aspeed_xdma.h	hw/misc/aspeed_xdma: Add AST2600 support	2021-05-01 10:03:52 +02:00
auxbus.h
avr_power.h	hw: Remove superfluous includes of hw/hw.h	2021-05-02 17:24:50 +02:00
bcm2835_cprman_internals.h
bcm2835_cprman.h
bcm2835_mbox_defs.h
bcm2835_mbox.h
bcm2835_mphi.h
bcm2835_property.h
bcm2835_rng.h
bcm2835_thermal.h
cbus.h
emc141x_regs.h
empty_slot.h
grlib_ahb_apb_pnp.h	hw: Replace anti-social QOM type names	2021-03-19 15:18:43 +01:00
imx6_ccm.h
imx6_src.h
imx6ul_ccm.h
imx7_ccm.h
imx7_gpr.h
imx7_snvs.h
imx25_ccm.h
imx31_ccm.h
imx_ccm.h
imx_rngc.h
iotkit-secctl.h	hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values	2021-03-08 17:20:01 +00:00
iotkit-sysctl.h	hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers	2021-03-08 17:20:02 +00:00
iotkit-sysinfo.h	hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR	2021-03-08 17:20:01 +00:00
ivshmem.h
led.h	hw/misc/led: Add yellow LED	2021-03-15 00:39:30 +01:00
mac_via.h	mac_via: rename VBL timer to 60Hz timer	2021-03-16 21:41:37 +01:00
max111x.h
mchp_pfsoc_dmc.h
mchp_pfsoc_ioscb.h
mchp_pfsoc_sysreg.h
mips_cmgcr.h
mips_cpc.h
mips_itu.h
mos6522.h
mps2-fpgaio.h	hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register	2021-03-08 17:20:03 +00:00
mps2-scc.h	hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping	2021-05-10 17:21:54 +01:00
msf2-sysreg.h
npcm7xx_clk.h	hw/timer: Refactor NPCM7XX Timer to use CLK clock	2021-01-12 21:19:02 +00:00
npcm7xx_gcr.h
npcm7xx_mft.h	hw/misc: Add NPCM7XX MFT Module	2021-03-12 12:48:56 +00:00
npcm7xx_pwm.h	hw/misc: Add GPIOs for duty in NPCM7xx PWM	2021-03-12 12:48:56 +00:00
npcm7xx_rng.h
nrf51_rng.h
pca9552_regs.h
pca9552.h
pvpanic.h	hw/misc/pvpanic: add PCI interface support	2021-01-29 10:47:28 +00:00
sifive_e_prci.h
sifive_test.h
sifive_u_otp.h
sifive_u_prci.h
stm32f2xx_syscfg.h
stm32f4xx_exti.h	hw: Remove superfluous includes of hw/hw.h	2021-05-02 17:24:50 +02:00
stm32f4xx_syscfg.h	hw: Remove superfluous includes of hw/hw.h	2021-05-02 17:24:50 +02:00
tmp105_regs.h
tz-mpc.h
tz-msc.h
tz-ppc.h
unimp.h
virt_ctrl.h	m68k: add a system controller	2021-03-15 21:02:57 +01:00
vmcoreinfo.h
xlnx-versal-xramc.h	hw/misc: versal: Add a model of the XRAM controller	2021-03-12 12:40:09 +00:00
zynq-xadc.h	hw: Replace anti-social QOM type names	2021-03-19 15:18:43 +01:00