macio: wire macio GPIOs to OpenPIC using sysbus IRQs
This both allows the wiring to be done as Ben suggested in his original comment in gpio.c and also enables the OpenPIC object property link to be removed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201229175619.6051-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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@ -57,10 +57,7 @@ void macio_set_gpio(MacIOGPIOState *s, uint32_t gpio, bool state)
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s->gpio_regs[gpio] = new_reg;
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/* This is will work until we fix the binding between MacIO and
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* the MPIC properly so we can route all GPIOs and avoid going
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* via the top level platform code.
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*
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/*
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* Note that we probably need to get access to the MPIC config to
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* decode polarity since qemu always use "raise" regardless.
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*
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@ -152,25 +149,15 @@ static const MemoryRegionOps macio_gpio_ops = {
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},
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};
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static void macio_gpio_realize(DeviceState *dev, Error **errp)
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{
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MacIOGPIOState *s = MACIO_GPIO(dev);
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s->gpio_extirqs[1] = qdev_get_gpio_in(DEVICE(s->pic),
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NEWWORLD_EXTING_GPIO1);
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s->gpio_extirqs[9] = qdev_get_gpio_in(DEVICE(s->pic),
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NEWWORLD_EXTING_GPIO9);
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}
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static void macio_gpio_init(Object *obj)
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{
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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MacIOGPIOState *s = MACIO_GPIO(obj);
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int i;
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object_property_add_link(obj, "pic", TYPE_OPENPIC,
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(Object **) &s->pic,
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qdev_prop_allow_set_link_before_realize,
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0);
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for (i = 0; i < 10; i++) {
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sysbus_init_irq(sbd, &s->gpio_extirqs[i]);
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}
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memory_region_init_io(&s->gpiomem, OBJECT(s), &macio_gpio_ops, obj,
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"gpio", 0x30);
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@ -207,7 +194,6 @@ static void macio_gpio_class_init(ObjectClass *oc, void *data)
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DeviceClass *dc = DEVICE_CLASS(oc);
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NMIClass *nc = NMI_CLASS(oc);
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dc->realize = macio_gpio_realize;
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dc->reset = macio_gpio_reset;
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dc->vmsd = &vmstate_macio_gpio;
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nc->nmi_monitor_handler = macio_gpio_nmi;
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@ -324,14 +324,16 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
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if (ns->has_pmu) {
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/* GPIOs */
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sysbus_dev = SYS_BUS_DEVICE(&ns->gpio);
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object_property_set_link(OBJECT(&ns->gpio), "pic", OBJECT(pic_dev),
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&error_abort);
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memory_region_add_subregion(&s->bar, 0x50,
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sysbus_mmio_get_region(sysbus_dev, 0));
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if (!qdev_realize(DEVICE(&ns->gpio), BUS(&s->macio_bus), errp)) {
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return;
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}
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sysbus_dev = SYS_BUS_DEVICE(&ns->gpio);
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sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
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NEWWORLD_EXTING_GPIO1));
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sysbus_connect_irq(sysbus_dev, 9, qdev_get_gpio_in(pic_dev,
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NEWWORLD_EXTING_GPIO9));
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memory_region_add_subregion(&s->bar, 0x50,
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sysbus_mmio_get_region(sysbus_dev, 0));
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/* PMU */
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object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU);
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@ -38,8 +38,6 @@ struct MacIOGPIOState {
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SysBusDevice parent;
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/*< public >*/
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OpenPICState *pic;
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MemoryRegion gpiomem;
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qemu_irq gpio_extirqs[10];
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uint8_t gpio_levels[8];
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