qemu/include/hw/arm
Francisco Iglesias 9a6d491831 hw/arm/xlnx-versal: 'Or' the interrupts from the BBRAM and RTC models
Add an orgate and 'or' the interrupts from the BBRAM and RTC models.

Signed-off-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Message-id: 20220121161141.14389-3-francisco.iglesias@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-01-28 14:29:46 +00:00
..
allwinner-a10.h
allwinner-h3.h
armsse-version.h
armsse.h
armv7m.h
aspeed_soc.h hw/arm/aspeed: Add the i3c device to the AST2600 SoC 2022-01-20 16:04:57 +00:00
aspeed.h hw/arm/aspeed: Allow machine to set UART default 2021-09-20 08:50:59 +02:00
bcm2835_peripherals.h
bcm2836.h
boot.h
digic.h
exynos4210.h
fdt.h
fsl-imx6.h
fsl-imx6ul.h
fsl-imx7.h
fsl-imx25.h
fsl-imx31.h
linux-boot-if.h
msf2-soc.h hw/arm/msf2-soc: Wire up refclk 2021-09-01 11:08:20 +01:00
npcm7xx.h hw/arm: Add Nuvoton SD module to board 2021-11-02 14:14:55 -04:00
nrf51_soc.h hw/arm/nrf51: Wire up sysclk 2021-09-01 11:08:20 +01:00
nrf51.h
omap.h
primecell.h
pxa.h
raspi_platform.h
sharpsl.h
smmu-common.h
smmuv3.h
soc_dma.h
stm32f100_soc.h
stm32f205_soc.h
stm32f405_soc.h hw/arm/stm32f405: Wire up sysclk and refclk 2021-09-01 11:08:19 +01:00
sysbus-fdt.h
virt.h hw/arm/virt: Add a control for the the highmem redistributors 2022-01-20 11:47:52 +00:00
xlnx-versal.h hw/arm/xlnx-versal: 'Or' the interrupts from the BBRAM and RTC models 2022-01-28 14:29:46 +00:00
xlnx-zynqmp.h hw/arm: xlnx-zcu102: Add Xilinx eFUSE device 2021-09-30 13:42:10 +01:00