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hw/arm: xlnx-zcu102: Add Xilinx eFUSE device

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Connect the support for ZynqMP eFUSE one-time field-programmable
bit array.

The command argument:
  -drive if=pflash,index=3,...
Can be used to optionally connect the bit array to a
backend storage, such that field-programmed values
in one invocation can be made available to next
invocation.

The backend storage must be a seekable binary file, and
its size must be 768 bytes or larger. A file with all
binary 0's is a 'blank'.

Signed-off-by: Tong Ho <tong.ho@xilinx.com>
Message-id: 20210917052400.1249094-9-tong.ho@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Tong Ho 2021-09-16 22:23:59 -07:00 committed by Peter Maydell
parent 7e47e15c8b
commit db1264df32
4 changed files with 48 additions and 0 deletions
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1
hw/Kconfig
View File

@ -82,3 +82,4 @@ config XLNX_ZYNQMP
select CAN_BUS
select PTIMER
select XLNX_BBRAM
select XLNX_EFUSE_ZYNQMP

15
hw/arm/xlnx-zcu102.c
View File

@ -110,6 +110,18 @@ static void bbram_attach_drive(XlnxBBRam *dev)
}
}
static void efuse_attach_drive(XlnxEFuse *dev)
{
DriveInfo *dinfo;
BlockBackend *blk;
dinfo = drive_get_by_index(IF_PFLASH, 3);
blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL;
if (blk) {
qdev_prop_set_drive(DEVICE(dev), "drive", blk);
}
}
static void xlnx_zcu102_init(MachineState *machine)
{
XlnxZCU102 *s = ZCU102_MACHINE(machine);
@ -151,6 +163,9 @@ static void xlnx_zcu102_init(MachineState *machine)
/* Attach bbram backend, if given */
bbram_attach_drive(&s->soc.bbram);
/* Attach efuse backend, if given */
efuse_attach_drive(&s->soc.efuse);
/* Create and plug in the SD cards */
for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
BusState *bus;

29
hw/arm/xlnx-zynqmp.c
View File

@ -69,6 +69,9 @@
#define BBRAM_ADDR 0xffcd0000
#define BBRAM_IRQ 11
#define EFUSE_ADDR 0xffcc0000
#define EFUSE_IRQ 87
#define SDHCI_CAPABILITIES 0x280737ec6481 /* Datasheet: UG1085 (v1.7) */
static const uint64_t gem_addr[XLNX_ZYNQMP_NUM_GEMS] = {
@ -245,6 +248,31 @@ static void xlnx_zynqmp_create_bbram(XlnxZynqMPState *s, qemu_irq *gic)
sysbus_connect_irq(sbd, 0, gic[BBRAM_IRQ]);
}
static void xlnx_zynqmp_create_efuse(XlnxZynqMPState *s, qemu_irq *gic)
{
Object *bits = OBJECT(&s->efuse);
Object *ctrl = OBJECT(&s->efuse_ctrl);
SysBusDevice *sbd;
object_initialize_child(OBJECT(s), "efuse-ctrl", &s->efuse_ctrl,
TYPE_XLNX_ZYNQMP_EFUSE);
object_initialize_child_with_props(ctrl, "xlnx-efuse@0", bits,
sizeof(s->efuse),
TYPE_XLNX_EFUSE, &error_abort,
"efuse-nr", "3",
"efuse-size", "2048",
NULL);
qdev_realize(DEVICE(bits), NULL, &error_abort);
object_property_set_link(ctrl, "efuse", bits, &error_abort);
sbd = SYS_BUS_DEVICE(ctrl);
sysbus_realize(sbd, &error_abort);
sysbus_mmio_map(sbd, 0, EFUSE_ADDR);
sysbus_connect_irq(sbd, 0, gic[EFUSE_IRQ]);
}
static void xlnx_zynqmp_create_unimp_mmio(XlnxZynqMPState *s)
{
static const struct UnimpInfo {
@ -646,6 +674,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]);
xlnx_zynqmp_create_bbram(s, gic_spi);
xlnx_zynqmp_create_efuse(s, gic_spi);
xlnx_zynqmp_create_unimp_mmio(s);
for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {

3
include/hw/arm/xlnx-zynqmp.h
View File

@ -37,6 +37,7 @@
#include "net/can_emu.h"
#include "hw/dma/xlnx_csu_dma.h"
#include "hw/nvram/xlnx-bbram.h"
#include "hw/nvram/xlnx-zynqmp-efuse.h"
#define TYPE_XLNX_ZYNQMP "xlnx-zynqmp"
OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
@ -102,6 +103,8 @@ struct XlnxZynqMPState {
MemoryRegion *ddr_ram;
MemoryRegion ddr_ram_low, ddr_ram_high;
XlnxBBRam bbram;
XlnxEFuse efuse;
XlnxZynqMPEFuse efuse_ctrl;
MemoryRegion mr_unimp[XLNX_ZYNQMP_NUM_UNIMP_AREAS];