91b1df8cf9
x86 was using additional CPU_DUMP_* flags, so make that configurable in CPUClass::reset_dump_flags. This adds reset logging for alpha, unicore32 and xtensa. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
169 lines
4.1 KiB
C
169 lines
4.1 KiB
C
/*
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* QEMU Moxie CPU
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*
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* Copyright (c) 2013 Anthony Green
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h"
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#include "qemu-common.h"
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#include "migration/vmstate.h"
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#include "machine.h"
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static void moxie_cpu_reset(CPUState *s)
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{
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MoxieCPU *cpu = MOXIE_CPU(s);
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MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(cpu);
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CPUMoxieState *env = &cpu->env;
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mcc->parent_reset(s);
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memset(env, 0, offsetof(CPUMoxieState, breakpoints));
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env->pc = 0x1000;
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tlb_flush(env, 1);
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}
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static void moxie_cpu_realizefn(DeviceState *dev, Error **errp)
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{
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MoxieCPU *cpu = MOXIE_CPU(dev);
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MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(dev);
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cpu_reset(CPU(cpu));
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mcc->parent_realize(dev, errp);
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}
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static void moxie_cpu_initfn(Object *obj)
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{
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CPUState *cs = CPU(obj);
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MoxieCPU *cpu = MOXIE_CPU(obj);
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static int inited;
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cs->env_ptr = &cpu->env;
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cpu_exec_init(&cpu->env);
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if (tcg_enabled() && !inited) {
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inited = 1;
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moxie_translate_init();
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}
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}
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static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
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{
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ObjectClass *oc;
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if (cpu_model == NULL) {
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return NULL;
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}
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oc = object_class_by_name(cpu_model);
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if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
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object_class_is_abstract(oc))) {
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return NULL;
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}
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return oc;
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}
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static void moxie_cpu_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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MoxieCPUClass *mcc = MOXIE_CPU_CLASS(oc);
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mcc->parent_realize = dc->realize;
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dc->realize = moxie_cpu_realizefn;
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mcc->parent_reset = cc->reset;
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cc->reset = moxie_cpu_reset;
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cc->class_by_name = moxie_cpu_class_by_name;
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cc->do_interrupt = moxie_cpu_do_interrupt;
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cc->dump_state = moxie_cpu_dump_state;
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cpu_class_set_vmsd(cc, &vmstate_moxie_cpu);
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}
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static void moxielite_initfn(Object *obj)
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{
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/* Set cpu feature flags */
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}
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static void moxie_any_initfn(Object *obj)
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{
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/* Set cpu feature flags */
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}
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typedef struct MoxieCPUInfo {
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const char *name;
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void (*initfn)(Object *obj);
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} MoxieCPUInfo;
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static const MoxieCPUInfo moxie_cpus[] = {
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{ .name = "MoxieLite", .initfn = moxielite_initfn },
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{ .name = "any", .initfn = moxie_any_initfn },
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};
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MoxieCPU *cpu_moxie_init(const char *cpu_model)
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{
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MoxieCPU *cpu;
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ObjectClass *oc;
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oc = moxie_cpu_class_by_name(cpu_model);
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if (oc == NULL) {
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return NULL;
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}
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cpu = MOXIE_CPU(object_new(object_class_get_name(oc)));
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cpu->env.cpu_model_str = cpu_model;
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object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
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return cpu;
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}
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static void cpu_register(const MoxieCPUInfo *info)
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{
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TypeInfo type_info = {
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.parent = TYPE_MOXIE_CPU,
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.instance_size = sizeof(MoxieCPU),
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.instance_init = info->initfn,
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.class_size = sizeof(MoxieCPUClass),
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};
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type_info.name = g_strdup_printf("%s-" TYPE_MOXIE_CPU, info->name);
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type_register(&type_info);
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g_free((void *)type_info.name);
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}
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static const TypeInfo moxie_cpu_type_info = {
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.name = TYPE_MOXIE_CPU,
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.parent = TYPE_CPU,
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.instance_size = sizeof(MoxieCPU),
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.instance_init = moxie_cpu_initfn,
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.class_size = sizeof(MoxieCPUClass),
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.class_init = moxie_cpu_class_init,
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};
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static void moxie_cpu_register_types(void)
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{
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int i;
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type_register_static(&moxie_cpu_type_info);
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for (i = 0; i < ARRAY_SIZE(moxie_cpus); i++) {
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cpu_register(&moxie_cpus[i]);
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}
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}
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type_init(moxie_cpu_register_types)
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