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Philippe Mathieu-Daudé 905bdf72a6 target/mips: Make check_cp0_enabled() return a boolean 
To avoid callers to emit dead code if check_cp0_enabled()
raise an exception, let it return a boolean value, whether
CP0 is enabled or not.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210420193453.1913810-4-f4bug@amsat.org>
2021-05-02 16:49:34 +02:00
..
addr.c
…
cp0_helper.c
…
cp0_timer.c
…
cpu-defs.c.inc
target/mips: Remove vendor specific CPU definitions
2021-01-14 17:13:54 +01:00
cpu-param.h
…
cpu-qom.h
…
cpu.c
Testing, guest-loader and other misc tweaks
2021-03-11 16:20:58 +00:00
cpu.h
target/mips: Promote 128-bit multimedia registers as global ones
2021-02-21 19:42:34 +01:00
dsp_helper.c
…
fpu_helper.c
…
fpu_helper.h
…
gdbstub.c
…
helper.h
…
internal.h
target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType
2021-02-21 19:42:34 +01:00
kvm_mips.h
…
kvm.c
sysemu: Let VMChangeStateHandler take boolean 'running' argument
2021-03-09 23:13:57 +01:00
lmmi_helper.c
…
machine.c
target/mips: Migrate missing CPU fields
2021-05-02 16:49:34 +02:00
meson.build
target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree
2021-03-13 23:43:07 +01:00
mips32r6.decode
target/mips: Convert Rel6 LL/SC opcodes to decodetree
2021-01-14 17:13:53 +01:00
mips64r6.decode
target/mips: Convert Rel6 LLD/SCD opcodes to decodetree
2021-01-14 17:13:53 +01:00
mips-defs.h
target/mips: Remove vendor specific CPU definitions
2021-01-14 17:13:54 +01:00
mips-semi.c
semihosting: Move include/hw/semihosting/ -> include/semihosting/
2021-03-10 15:34:12 +00:00
msa32.decode
target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes
2021-01-14 17:13:53 +01:00
msa64.decode
target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes
2021-01-14 17:13:53 +01:00
msa_helper.c
target/mips: Include missing "tcg/tcg.h" header
2021-02-21 19:42:34 +01:00
msa_helper.h.inc
…
msa_translate.c
target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes
2021-01-14 17:13:53 +01:00
mxu_translate.c
target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX
2021-03-22 15:05:41 +01:00
op_helper.c
target/mips: Let do_translate_address() take MMUAccessType argument
2021-02-21 19:42:34 +01:00
rel6_translate.c
target/mips/rel6_translate: Change license to GNU LGPL v2.1 (or later)
2021-04-20 12:52:04 +01:00
tlb_helper.c
target/mips: Remove unused 'rw' argument from page_table_walk_refill()
2021-02-21 19:42:34 +01:00
TODO
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trace-events
…
trace.h
…
translate_addr_const.c
target/mips: Extract LSA/DLSA translation generators
2021-01-14 17:13:53 +01:00
translate.c
target/mips: Make check_cp0_enabled() return a boolean
2021-05-02 16:49:34 +02:00
translate.h
target/mips: Make check_cp0_enabled() return a boolean
2021-05-02 16:49:34 +02:00
tx79_translate.c
target/mips/tx79: Salvage instructions description comment
2021-03-13 23:43:30 +01:00
tx79.decode
target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree
2021-03-13 23:43:24 +01:00
txx9_translate.c
target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree
2021-03-13 23:43:07 +01:00