Bastian Koppelmann 8da70480f5 target/tricore: Fix RR_JLI clobbering reg A[11] ... if A[r1] == A[11], then we would overwrite the destination address of the jump with the return address. Reported-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230621142302.1648383-2-kbastian@mail.uni-paderborn.de>		2023-06-21 18:09:54 +02:00
..
cpu-param.h	target/tricore: Remove NB_MMU_MODES define	2023-03-13 06:44:37 -07:00
cpu-qom.h	target/tricore: Convert to 3-phase reset	2022-12-16 15:58:16 +00:00
cpu.c	target/tricore: Introduce ISA 1.6.2 feature	2023-06-21 17:56:45 +02:00
cpu.h	target/tricore: Introduce ISA 1.6.2 feature	2023-06-21 17:56:45 +02:00
csfr.h.inc	target/tricore: Rename csfr.def -> csfr.h.inc	2022-11-05 20:35:45 +01:00
fpu_helper.c	tricore: add QSEED instruction	2019-06-25 15:02:07 +02:00
gdbstub.c	gdbstub: move register helpers into standalone include	2023-03-07 20:44:08 +00:00
helper.c	target/tricore: Remove pointless CONFIG_SOFTMMU guard	2023-06-20 10:01:30 +02:00
helper.h	target/tricore: Add shuffle insn	2023-06-21 18:09:48 +02:00
Kconfig	meson: Introduce target-specific Kconfig	2021-07-09 18:21:34 +02:00
meson.build	meson: Replace softmmu_ss -> system_ss	2023-06-20 10:01:30 +02:00
op_helper.c	target/tricore: Fix helper_ret() not correctly restoring PSW	2023-06-21 18:09:54 +02:00
translate.c	target/tricore: Fix RR_JLI clobbering reg A[11]	2023-06-21 18:09:54 +02:00
tricore-defs.h	tcg: Split out target/arch/cpu-param.h	2019-06-10 07:03:34 -07:00
tricore-opcodes.h	target/tricore: Add DISABLE insn variant	2023-06-21 18:09:54 +02:00