Philippe Mathieu-Daudé f15258b196 target/mips: Fix TX79 LQ/SQ opcodes ... The base register address offset is *signed*. Cc: qemu-stable@nongnu.org Fixes: aaaa82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230914090447.12557-1-philmd@linaro.org> (cherry picked from commit 18f86aecd6) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>		2023-11-19 21:15:06 +03:00
..
sysemu	target/mips: Rework cp0_timer with clock API	2023-07-10 21:53:03 +02:00
tcg	target/mips: Fix TX79 LQ/SQ opcodes	2023-11-19 21:15:06 +03:00
cpu-defs.c.inc	target/mips: enable GINVx support for I6400 and I6500	2023-07-10 23:33:38 +02:00
cpu-param.h	target/mips: Remove NB_MMU_MODES define	2023-03-13 06:44:37 -07:00
cpu-qom.h	target/mips: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
cpu.c	target/mips: Implement Loongson CSR instructions	2023-07-10 23:33:37 +02:00
cpu.h	target/mips: Implement Loongson CSR instructions	2023-07-10 23:33:37 +02:00
fpu_helper.h	target/mips: Set set_default_nan_mode with set_snan_bit_is_one	2021-05-16 07:13:51 -05:00
fpu.c	target/mips: Optimize CPU/FPU regnames[] arrays	2021-05-02 16:49:34 +02:00
gdbstub.c	gdbstub: move register helpers into standalone include	2023-03-07 20:44:08 +00:00
helper.h	target/mips: Implement Loongson CSR instructions	2023-07-10 23:33:37 +02:00
internal.h	target/mips: Implement Loongson CSR instructions	2023-07-10 23:33:37 +02:00
Kconfig	meson: Introduce target-specific Kconfig	2021-07-09 18:21:34 +02:00
kvm_mips.h	kvm: Introduce kvm_arch_get_default_type hook	2023-08-24 18:43:47 +03:00
kvm.c	kvm: Introduce kvm_arch_get_default_type hook	2023-08-24 18:43:47 +03:00
meson.build	meson: Replace softmmu_ss -> system_ss	2023-06-20 10:01:30 +02:00
mips-defs.h	target/mips: introduce decodetree structure for Cavium Octeon extension	2022-07-12 22:30:09 +02:00
msa.c	target/mips: Move msa_reset() to new source file	2021-05-02 16:49:34 +02:00