Alex Bennée 8b092ca9ef target-arm: A64: Move handle_2misc_narrow function ...

Move the handle_2misc_narrow() function up the file so that it can
be called from disas_simd_scalar_two_reg_misc().

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-22-git-send-email-peter.maydell@linaro.org

2014-03-17 16:31:52 +00:00

..

arm-semi.c

cpu: Move opaque field from CPU_COMMON to CPUState

2014-03-13 19:20:47 +01:00

cpu64.c

target-arm: A64: Make cache ID registers visible to AArch64

2014-02-26 17:20:01 +00:00

cpu-qom.h

target-arm: Implement AArch64 ID and feature registers

2014-02-26 17:20:05 +00:00

cpu.c

cputlb: Change tlb_flush() argument to CPUState

2014-03-13 19:52:47 +01:00

cpu.h

cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook

2014-03-13 19:20:46 +01:00

crypto_helper.c

…

gdbstub64.c

…

gdbstub.c

…

helper-a64.c

target-arm: A64: Add FRECPX (reciprocal exponent)

2014-03-17 16:31:50 +00:00

helper-a64.h

target-arm: A64: Add FRECPX (reciprocal exponent)

2014-03-17 16:31:50 +00:00

helper.c

target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE

2014-03-17 16:31:52 +00:00

helper.h

target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE

2014-03-17 16:31:52 +00:00

iwmmxt_helper.c

…

kvm32.c

…

kvm64.c

…

kvm_arm.h

arm: vgic device control api support

2014-02-26 17:20:00 +00:00

kvm-consts.h

target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs

2014-02-20 10:35:50 +00:00

kvm-stub.c

…

kvm.c

arm: vgic device control api support

2014-02-26 17:20:00 +00:00

machine.c

…

Makefile.objs

…

neon_helper.c

target-arm: A64: Implement remaining 3-same instructions

2014-02-20 10:35:50 +00:00

op_addsub.h

…

op_helper.c

translate-all: Change cpu_restore_state() argument to CPUState

2014-03-13 19:20:47 +01:00

translate-a64.c

target-arm: A64: Move handle_2misc_narrow function

2014-03-17 16:31:52 +00:00

translate.c

target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE

2014-03-17 16:31:52 +00:00

translate.h

target-arm: A64: Implement PMULL instruction

2014-03-17 16:31:47 +00:00