qemu/target-arm
Michael S. Tsirkin 7b1aa025bd target-arm: fix build with gcc 4.8.2
commit 5ce4f35781
    "target-arm: A64: add set_pc cpu method"

introduces an array aarch64_cpus which is zero
size if this code is built without CONFIG_USER_ONLY.
In particular an attempt to iterate over this array produces a warning
under gcc 4.8.2:

 CC    aarch64-softmmu/target-arm/cpu64.o
/scm/qemu/target-arm/cpu64.c: In function ‘aarch64_cpu_register_types’:
/scm/qemu/target-arm/cpu64.c:124:5: error: comparison of unsigned
expression < 0 is always false [-Werror=type-limits]
     for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) {
     ^
cc1: all warnings being treated as errors

This is the result of ARRAY_SIZE being an unsigned type,
causing "i" to be promoted to unsigned int as well.

As zero size arrays are a gcc extension, it seems
cleanest to add a dummy element with NULL name,
and test for it during registration.

We'll be able to drop this when we add more CPUs.

Cc: Alexander Graf <agraf@suse.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20131223145216.GA22663@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-08 19:07:22 +00:00
..
arm-semi.c exec: Change cpu_memory_rw_debug() argument to CPUState 2013-07-23 02:41:33 +02:00
cpu64.c target-arm: fix build with gcc 4.8.2 2014-01-08 19:07:22 +00:00
cpu-qom.h ARM: cpu: add "reset_hivecs" property 2013-12-17 19:42:29 +00:00
cpu.c target-arm: Clean up handling of AArch64 PSTATE 2013-12-17 19:42:30 +00:00
cpu.h target-arm: Give the FPSCR rounding modes names 2014-01-08 19:07:21 +00:00
crypto_helper.c target-arm: add support for v8 AES instructions 2013-12-17 19:42:25 +00:00
gdbstub64.c target-arm: Clean up handling of AArch64 PSTATE 2013-12-17 19:42:30 +00:00
gdbstub.c cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
helper-a64.c target-arm: A64: Add support for floating point compare 2014-01-08 19:07:21 +00:00
helper-a64.h target-arm: A64: Add support for floating point compare 2014-01-08 19:07:21 +00:00
helper.c target-arm: remove raw_read|write duplication 2014-01-08 19:07:21 +00:00
helper.h target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum 2014-01-08 19:07:21 +00:00
iwmmxt_helper.c misc: Use new rotate functions 2013-09-25 21:23:05 +02:00
kvm32.c target-arm/kvm: Split 32 bit only code into its own file 2013-12-17 19:42:29 +00:00
kvm64.c target-arm: Add minimal KVM AArch64 support 2013-12-17 19:42:30 +00:00
kvm_arm.h target-arm: Provide '-cpu host' when running KVM 2013-12-10 13:28:49 +00:00
kvm-consts.h target-arm: Update generic cpreg code for AArch64 2014-01-04 22:15:44 +00:00
kvm-stub.c target-arm: Initialize cpreg list from KVM when using KVM 2013-06-25 18:16:10 +01:00
kvm.c target-arm: Add minimal KVM AArch64 support 2013-12-17 19:42:30 +00:00
machine.c target-arm: Widen exclusive-access support struct fields to 64 bits 2014-01-08 19:07:20 +00:00
Makefile.objs target-arm: A64: add stubs for a64 specific helpers 2013-12-17 19:42:32 +00:00
neon_helper.c target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum 2014-01-08 19:07:21 +00:00
op_addsub.h Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_helper.c cpu: Move halted and interrupt_request fields to CPUState 2013-03-12 10:35:55 +01:00
translate-a64.c target-arm: A64: Add support for floating point cond select 2014-01-08 19:07:21 +00:00
translate.c target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum 2014-01-08 19:07:21 +00:00
translate.h target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoder 2014-01-07 19:17:58 +00:00