ARM: cpu: add "reset_hivecs" property
Add an ARM CPU property for the reset value of hivecs as it is a board/SoC configurable setting. The existence of the property is conditional on the ARM CPU not being M class. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: b04216c6bda4bd163f44a55bba552d0e8267481f.1387160489.git.peter.crosthwaite@xilinx.com [ PC Changes: * Elaborated commit message * refactored to use qdev_property_add_static ] Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -139,6 +139,7 @@ typedef struct ARMCPU {
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uint32_t ccsidr[16];
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uint32_t reset_cbar;
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uint32_t reset_auxcr;
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bool reset_hivecs;
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} ARMCPU;
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#define TYPE_AARCH64_CPU "aarch64-cpu"
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@ -235,6 +235,9 @@ static void arm_cpu_initfn(Object *obj)
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static Property arm_cpu_reset_cbar_property =
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DEFINE_PROP_UINT32("reset-cbar", ARMCPU, reset_cbar, 0);
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static Property arm_cpu_reset_hivecs_property =
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DEFINE_PROP_BOOL("reset-hivecs", ARMCPU, reset_hivecs, false);
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static void arm_cpu_post_init(Object *obj)
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{
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ARMCPU *cpu = ARM_CPU(obj);
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@ -245,6 +248,12 @@ static void arm_cpu_post_init(Object *obj)
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&err);
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assert_no_error(err);
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}
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if (!arm_feature(&cpu->env, ARM_FEATURE_M)) {
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qdev_property_add_static(DEVICE(obj), &arm_cpu_reset_hivecs_property,
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&err);
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assert_no_error(err);
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}
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}
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static void arm_cpu_finalizefn(Object *obj)
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@ -307,6 +316,10 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
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set_feature(env, ARM_FEATURE_PXN);
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}
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if (cpu->reset_hivecs) {
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cpu->reset_sctlr |= (1 << 13);
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}
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register_cp_regs_for_features(cpu);
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arm_cpu_register_gdb_regs_for_features(cpu);
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