qemu/target
Richard Henderson 8b94ec53f3 target/s390x: Move trans_exc_code update to do_program_interrupt
This solves a problem in which the store to LowCore during tlb_fill
triggers a clean-page TB invalidation for page0 during translation,
which results in an assertion failure for locked pages.

By delaying the store until after the exception has been raised,
we will have unwound the pages locked for translation and the
problem does not arise.  There are plenty of other updates to
LowCore while delivering an interrupt/exception; trans_exc_code
does not need to be special.

Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-07-31 12:19:13 -07:00
..
alpha other architectures: spelling fixes 2023-07-25 17:14:07 +03:00
arm target/arm/tcg: Don't build AArch64 decodetree files for qemu-system-arm 2023-07-31 11:41:21 +01:00
avr target/avr: Fix handling of interrupts above 33. 2023-07-08 07:24:38 +03:00
cris other architectures: spelling fixes 2023-07-25 17:14:07 +03:00
hexagon target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
hppa other architectures: spelling fixes 2023-07-25 17:14:07 +03:00
i386 target/i386: Use aesdec_ISB_ISR_IMC_AK 2023-07-08 07:30:18 +01:00
loongarch other architectures: spelling fixes 2023-07-25 17:14:07 +03:00
m68k other architectures: spelling fixes 2023-07-25 17:14:07 +03:00
microblaze other architectures: spelling fixes 2023-07-25 17:14:07 +03:00
mips target/mips: Avoid shift by negative number in page_table_walk_refill() 2023-07-25 14:41:16 +02:00
nios2 target/nios2 : Explicitly ask for target-endian loads and stores 2023-07-01 08:26:54 +02:00
openrisc other architectures: spelling fixes 2023-07-25 17:14:07 +03:00
ppc target/ppc: Disable goto_tb with architectural singlestep 2023-07-31 12:19:13 -07:00
riscv target/riscv: Fix LMUL check to use VLEN 2023-07-19 14:37:26 +10:00
rx other architectures: spelling fixes 2023-07-25 17:14:07 +03:00
s390x target/s390x: Move trans_exc_code update to do_program_interrupt 2023-07-31 12:19:13 -07:00
sh4 target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
sparc trivial-patches 25-07-2023 2023-07-25 16:30:52 +01:00
tricore target/tricore: Rename tricore_feature 2023-07-25 17:18:51 +03:00
xtensa target/xtensa: Assert that interrupt level is within bounds 2023-07-06 13:26:43 +01:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00