qemu/target/i386
Peter Maydell 972e848b53 s390x fixes and cleanups; also related fixes in xtensa,
arm, and x86 code
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Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210520-v2' into staging

s390x fixes and cleanups; also related fixes in xtensa,
arm, and x86 code

# gpg: Signature made Thu 20 May 2021 13:23:15 BST
# gpg:                using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF
# gpg:                issuer "cohuck@redhat.com"
# gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown]
# gpg:                 aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full]
# gpg:                 aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full]
# gpg:                 aka "Cornelia Huck <cohuck@kernel.org>" [unknown]
# gpg:                 aka "Cornelia Huck <cohuck@redhat.com>" [unknown]
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0  18CE DECF 6B93 C6F0 2FAF

* remotes/cohuck-gitlab/tags/s390x-20210520-v2:
  tests/tcg/x86_64: add vsyscall smoke test
  target/i386: Make sure that vsyscall's tb->size != 0
  vfio-ccw: Attempt to clean up all IRQs on error
  hw/s390x/ccw: Register qbus type in abstract TYPE_CCW_DEVICE parent
  vfio-ccw: Permit missing IRQs
  accel/tcg: Assert that tb->size != 0 after translation
  target/xtensa: Make sure that tb->size != 0
  target/arm: Make sure that commpage's tb->size != 0
  target/s390x: Fix translation exception on illegal instruction

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-20 18:42:00 +01:00
..
hax numa: Teach ram block notifiers about resizeable ram blocks 2021-05-13 18:21:13 +01:00
hvf i386: split cpu accelerators from cpu.c, using AccelCPUClass 2021-05-10 15:41:49 -04:00
kvm accel-cpu: make cpu_realizefn return a bool 2021-05-10 15:41:50 -04:00
nvmm Add NVMM accelerator: x86 CPU support 2021-05-04 14:15:34 +02:00
tcg s390x fixes and cleanups; also related fixes in xtensa, 2021-05-20 18:42:00 +01:00
whpx sysemu: Let VMChangeStateHandler take boolean 'running' argument 2021-03-09 23:13:57 +01:00
arch_dump.c
arch_memory_mapping.c
cpu-dump.c i386: move cpu dump out of helper.c into cpu-dump.c 2020-12-16 14:06:53 -05:00
cpu-internal.h i386: split off sysemu part of cpu.c 2021-05-10 15:41:52 -04:00
cpu-param.h
cpu-qom.h qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
cpu-sysemu.c i386: split off sysemu part of cpu.c 2021-05-10 15:41:52 -04:00
cpu.c i386: split off sysemu part of cpu.c 2021-05-10 15:41:52 -04:00
cpu.h target/i386: Inline user cpu_svm_check_intercept_param 2021-05-19 12:17:11 -05:00
gdbstub.c target/i386: gdbstub: only write CR0/CR2/CR3/EFER for sysemu 2021-05-10 15:41:52 -04:00
helper.c i386: make cpu_load_efer sysemu-only 2021-05-10 15:41:52 -04:00
helper.h target/i386: Remove user-only i/o stubs 2021-05-19 12:17:23 -05:00
host-cpu.c accel-cpu: make cpu_realizefn return a bool 2021-05-10 15:41:50 -04:00
host-cpu.h accel-cpu: make cpu_realizefn return a bool 2021-05-10 15:41:50 -04:00
machine.c vmstate: Constify some VMStateDescriptions 2021-05-02 17:24:50 +02:00
meson.build i386: split off sysemu part of cpu.c 2021-05-10 15:41:52 -04:00
monitor.c sev: update sev-inject-launch-secret to make gpa optional 2021-02-16 17:15:39 +01:00
ops_sse_header.h x86 tcg cpus: Fix Lesser GPL version number 2020-11-15 16:41:42 +01:00
ops_sse.h x86 tcg cpus: Fix Lesser GPL version number 2020-11-15 16:41:42 +01:00
sev_i386.h sev/i386: Add initial support for SEV-ES 2021-02-16 17:15:39 +01:00
sev-stub.c sev/i386: Allow AP booting under SEV-ES 2021-02-16 17:15:39 +01:00
sev.c numa: Teach ram block notifiers about resizeable ram blocks 2021-05-13 18:21:13 +01:00
shift_helper_template.h x86 tcg cpus: Fix Lesser GPL version number 2020-11-15 16:41:42 +01:00
svm.h target/i386: move paging mode constants from SVM to cpu.h 2021-05-11 04:11:13 -04:00
trace-events i386: move kvm accel files into kvm/ 2020-12-16 14:06:52 -05:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
xsave_helper.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00