qemu/accel/tcg
Peter Maydell f454a54f3b accel/tcg/user-exec: Don't parse aarch64 insns to test for read vs write
In cpu_signal_handler() for aarch64 hosts, currently we parse
the faulting instruction to see if it is a load or a store.
Since the 3.16 kernel (~2014), the kernel has provided us with
the syndrome register for a fault, which includes the WnR bit.
Use this instead if it is present, only falling back to
instruction parsing if not.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190108180014.32386-1-peter.maydell@linaro.org
2019-01-29 11:46:04 +00:00
..
atomic_template.h tcg: Split CONFIG_ATOMIC128 2018-10-18 19:46:36 -07:00
cpu-exec-common.c icount: fix cpu_restore_state_from_tb for non-tb-exit cases 2018-04-11 09:05:22 +10:00
cpu-exec.c tcg: Implement CPU_LOG_TB_NOCHAIN during expansion 2018-10-18 18:58:10 -07:00
cputlb.c cputlb: Remove static tlb sizing 2019-01-28 07:04:35 -08:00
Makefile.objs tcg: Add generic vector expanders 2018-02-08 15:54:05 +00:00
softmmu_template.h cputlb: read CPUTLBEntry.addr_write atomically 2018-10-18 19:46:53 -07:00
tcg-all.c tcg: access cpu->icount_decr.u16.high with atomics 2018-10-18 18:58:10 -07:00
tcg-runtime-gvec.c tcg: Add opcodes for vector minmax arithmetic 2019-01-28 07:03:34 -08:00
tcg-runtime.c
tcg-runtime.h tcg: Add opcodes for vector minmax arithmetic 2019-01-28 07:03:34 -08:00
trace-events
translate-all.c build-sys: don't include windows.h, osdep.h does it 2019-01-11 13:57:24 +01:00
translate-all.h move public invalidate APIs out of translate-all.{c,h}, clean up 2018-06-28 19:05:30 +02:00
translator.c translator: fix breakpoint processing 2018-10-02 19:08:57 +02:00
user-exec-stub.c i386/cpu: make -cpu host support monitor/mwait 2018-06-29 13:02:47 +02:00
user-exec.c accel/tcg/user-exec: Don't parse aarch64 insns to test for read vs write 2019-01-29 11:46:04 +00:00