Fabian Aggeler 7c0fa108d9 hw/intc/arm_gic: Handle grouping for GICC_HPPIR
Grouping (GICv2) and Security Extensions change the behaviour of reads
of the highest priority pending interrupt register (ICCHPIR/GICC_HPPIR).

Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1430502643-25909-12-git-send-email-peter.maydell@linaro.org
Message-id: 1429113742-8371-12-git-send-email-greg.bellows@linaro.org
[PMM: make utility fn static; coding style fixes; AckCtl has an effect
 for GICv2 without security extensions as well; removed checks on enable
 bits because these are done when we set current_pending[cpu]]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-05-12 11:57:18 +01:00
2015-05-08 14:11:10 +03:00
2015-05-12 09:01:51 +01:00
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2015-05-11 16:25:33 +01:00
2015-05-11 08:59:07 -04:00
2015-05-12 10:40:31 +01:00
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2015-04-28 15:36:09 +02:00
2015-04-26 16:49:24 +01:00
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2015-05-08 14:11:10 +03:00
2015-05-12 10:40:31 +01:00
2015-04-30 16:55:16 +02:00
2015-05-11 16:25:33 +01:00
2015-05-11 08:59:07 -04:00
2015-04-26 16:49:24 +01:00
2015-04-25 22:05:07 +01:00

Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org

- QEMU team
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