7b84fd04bd
We only need to track slot for predicated stores and predicated HVX
instructions.
Add arguments to the probe helper functions to indicate if the slot
is predicated.
Here is a simple example of the differences in the TCG code generated:
IN:
0x00400094: 0xf900c102 { if (P0) R2 = and(R0,R1) }
BEFORE
---- 00400094
mov_i32 slot_cancelled,$0x0
mov_i32 new_r2,r2
and_i32 tmp0,p0,$0x1
brcond_i32 tmp0,$0x0,eq,$L1
and_i32 tmp0,r0,r1
mov_i32 new_r2,tmp0
br $L2
set_label $L1
or_i32 slot_cancelled,slot_cancelled,$0x8
set_label $L2
mov_i32 r2,new_r2
AFTER
---- 00400094
mov_i32 new_r2,r2
and_i32 tmp0,p0,$0x1
brcond_i32 tmp0,$0x0,eq,$L1
and_i32 tmp0,r0,r1
mov_i32 new_r2,tmp0
br $L2
set_label $L1
set_label $L2
mov_i32 r2,new_r2
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230307025828.1612809-14-tsimpson@quicinc.com>
917 lines
29 KiB
Plaintext
917 lines
29 KiB
Plaintext
%{
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/*
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* Copyright(c) 2019-2023 rev.ng Labs Srl. All Rights Reserved.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "idef-parser.h"
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#include "parser-helpers.h"
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#include "idef-parser.tab.h"
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#include "idef-parser.yy.h"
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/* Uncomment this to disable yyasserts */
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/* #define NDEBUG */
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#define ERR_LINE_CONTEXT 40
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%}
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%lex-param {void *scanner}
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%parse-param {void *scanner}
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%parse-param {Context *c}
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%define parse.error verbose
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%define parse.lac full
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%define api.pure full
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%locations
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%union {
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GString *string;
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HexValue rvalue;
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HexSat sat;
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HexCast cast;
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HexExtract extract;
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HexMpy mpy;
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HexSignedness signedness;
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int index;
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}
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/* Tokens */
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%start input
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%expect 1
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%token IN INAME VAR
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%token ABS CROUND ROUND CIRCADD COUNTONES INC DEC ANDA ORA XORA PLUSPLUS ASL
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%token ASR LSR EQ NEQ LTE GTE MIN MAX ANDL FOR ICIRC IF MUN FSCR FCHK SXT
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%token ZXT CONSTEXT LOCNT BREV SIGN LOAD STORE PC LPCFG
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%token LOAD_CANCEL STORE_CANCEL CANCEL IDENTITY ROTL INSBITS SETBITS EXTRANGE
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%token CAST4_8U FAIL CARRY_FROM_ADD ADDSAT64 LSBNEW
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%token TYPE_SIZE_T TYPE_INT TYPE_SIGNED TYPE_UNSIGNED TYPE_LONG
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%token <rvalue> REG IMM PRED
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%token <index> ELSE
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%token <mpy> MPY
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%token <sat> SAT
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%token <cast> CAST DEPOSIT SETHALF
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%token <extract> EXTRACT
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%type <string> INAME
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%type <rvalue> rvalue lvalue VAR assign_statement var var_decl var_type
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%type <rvalue> FAIL
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%type <rvalue> TYPE_SIGNED TYPE_UNSIGNED TYPE_INT TYPE_LONG TYPE_SIZE_T
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%type <index> if_stmt IF
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%type <signedness> SIGN
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/* Operator Precedences */
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%left MIN MAX
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%left '('
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%left ','
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%left '='
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%right CIRCADD
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%right INC DEC ANDA ORA XORA
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%left '?' ':'
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%left ANDL
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%left '|'
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%left '^' ANDOR
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%left '&'
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%left EQ NEQ
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%left '<' '>' LTE GTE
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%left ASL ASR LSR
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%right ABS
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%left '-' '+'
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%left '*' '/' '%' MPY
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%right '~' '!'
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%left '['
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%right CAST
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%right LOCNT BREV
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/* Bison Grammar */
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%%
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/* Input file containing the description of each hexagon instruction */
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input : instructions
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{
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/* Suppress warning about unused yynerrs */
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(void) yynerrs;
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YYACCEPT;
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}
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;
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instructions : instruction instructions
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| %empty
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;
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instruction : INAME
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{
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gen_inst(c, $1);
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}
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arguments
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{
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EMIT_SIG(c, ")");
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EMIT_HEAD(c, "{\n");
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}
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code
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{
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gen_inst_code(c, &@1);
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}
|
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| error /* Recover gracefully after instruction compilation error */
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{
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free_instruction(c);
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}
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;
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arguments : '(' ')'
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| '(' argument_list ')';
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|
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argument_list : argument_decl ',' argument_list
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| argument_decl
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;
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var : VAR
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{
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track_string(c, $1.var.name);
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$$ = $1;
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}
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;
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/*
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* Here the integer types are defined from valid combinations of
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* `signed`, `unsigned`, `int`, and `long` tokens. The `signed`
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* and `unsigned` tokens are here assumed to always be placed
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* first in the type declaration, which is not the case in
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* normal C. Similarly, `int` is assumed to always be placed
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* last in the type.
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*/
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type_int : TYPE_INT
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| TYPE_SIGNED
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| TYPE_SIGNED TYPE_INT;
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type_uint : TYPE_UNSIGNED
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| TYPE_UNSIGNED TYPE_INT;
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type_ulonglong : TYPE_UNSIGNED TYPE_LONG TYPE_LONG
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| TYPE_UNSIGNED TYPE_LONG TYPE_LONG TYPE_INT;
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|
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/*
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* Here the various valid int types defined above specify
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* their `signedness` and `bit_width`. The LP64 convention
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* is assumed where longs are 64-bit, long longs are then
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* assumed to also be 64-bit.
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*/
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var_type : TYPE_SIZE_T
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{
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yyassert(c, &@1, $1.bit_width <= 64,
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"Variables with size > 64-bit are not supported!");
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$$ = $1;
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}
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| type_int
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|
{
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$$.signedness = SIGNED;
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$$.bit_width = 32;
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}
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| type_uint
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{
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$$.signedness = UNSIGNED;
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$$.bit_width = 32;
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}
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| type_ulonglong
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{
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$$.signedness = UNSIGNED;
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$$.bit_width = 64;
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}
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;
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/* Rule to capture declarations of VARs */
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var_decl : var_type IMM
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{
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/*
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* Rule to capture "int i;" declarations since "i" is special
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* and assumed to be always be IMM. Moreover, "i" is only
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* assumed to be used in for-loops.
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*
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* Therefore we want to NOP these declarations.
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*/
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yyassert(c, &@2, $2.imm.type == I,
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"Variable declaration with immedaties only allowed"
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" for the loop induction variable \"i\"");
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$$ = $2;
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}
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| var_type var
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{
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/*
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* Allocate new variable, this checks that it hasn't already
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* been declared.
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*/
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gen_varid_allocate(c, &@1, &$2, $1.bit_width, $1.signedness);
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/* Copy var for variable name */
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$$ = $2;
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/* Copy type info from var_type */
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$$.signedness = $1.signedness;
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$$.bit_width = $1.bit_width;
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}
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;
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/* Return the modified registers list */
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code : '{' statements '}'
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{
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c->inst.code_begin = c->input_buffer + @2.first_column - 1;
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c->inst.code_end = c->input_buffer + @2.last_column - 1;
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}
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| '{'
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{
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/* Nop */
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}
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'}'
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;
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argument_decl : REG
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{
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emit_arg(c, &@1, &$1);
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/* Enqueue register into initialization list */
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g_array_append_val(c->inst.init_list, $1);
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}
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| PRED
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{
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emit_arg(c, &@1, &$1);
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/* Enqueue predicate into initialization list */
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g_array_append_val(c->inst.init_list, $1);
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}
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| IN REG
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{
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emit_arg(c, &@2, &$2);
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}
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| IN PRED
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{
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emit_arg(c, &@2, &$2);
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}
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| IMM
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{
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EMIT_SIG(c, ", int %ciV", $1.imm.id);
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}
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;
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code_block : '{' statements '}'
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| '{' '}'
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;
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/* A list of one or more statements */
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statements : statements statement
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| statement
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;
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/* Statements can be assignment (rvalue ';'), control or memory statements */
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statement : control_statement
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| var_decl ';'
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| rvalue ';'
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| code_block
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| ';'
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;
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assign_statement : lvalue '=' rvalue
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{
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@1.last_column = @3.last_column;
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gen_assign(c, &@1, &$1, &$3);
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$$ = $1;
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}
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| var_decl '=' rvalue
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{
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@1.last_column = @3.last_column;
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gen_assign(c, &@1, &$1, &$3);
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$$ = $1;
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}
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| lvalue INC rvalue
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{
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@1.last_column = @3.last_column;
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HexValue tmp = gen_bin_op(c, &@1, ADD_OP, &$1, &$3);
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gen_assign(c, &@1, &$1, &tmp);
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$$ = $1;
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}
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| lvalue DEC rvalue
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{
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@1.last_column = @3.last_column;
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HexValue tmp = gen_bin_op(c, &@1, SUB_OP, &$1, &$3);
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gen_assign(c, &@1, &$1, &tmp);
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$$ = $1;
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}
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| lvalue ANDA rvalue
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{
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@1.last_column = @3.last_column;
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HexValue tmp = gen_bin_op(c, &@1, ANDB_OP, &$1, &$3);
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gen_assign(c, &@1, &$1, &tmp);
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$$ = $1;
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}
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| lvalue ORA rvalue
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{
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@1.last_column = @3.last_column;
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HexValue tmp = gen_bin_op(c, &@1, ORB_OP, &$1, &$3);
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gen_assign(c, &@1, &$1, &tmp);
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$$ = $1;
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}
|
|
| lvalue XORA rvalue
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{
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@1.last_column = @3.last_column;
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|
HexValue tmp = gen_bin_op(c, &@1, XORB_OP, &$1, &$3);
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gen_assign(c, &@1, &$1, &tmp);
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$$ = $1;
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}
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| PRED '=' rvalue
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{
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@1.last_column = @3.last_column;
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gen_pred_assign(c, &@1, &$1, &$3);
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}
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|
| IMM '=' rvalue
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|
{
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|
@1.last_column = @3.last_column;
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|
yyassert(c, &@1, $3.type == IMMEDIATE,
|
|
"Cannot assign non-immediate to immediate!");
|
|
yyassert(c, &@1, $1.imm.type == VARIABLE,
|
|
"Cannot assign to non-variable!");
|
|
/* Assign to the function argument */
|
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OUT(c, &@1, &$1, " = ", &$3, ";\n");
|
|
$$ = $1;
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|
}
|
|
| LOAD '(' IMM ',' IMM ',' SIGN ',' var ',' lvalue ')'
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|
{
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|
@1.last_column = @12.last_column;
|
|
yyassert(c, &@1, !is_inside_ternary(c),
|
|
"Assignment side-effect not modeled!");
|
|
yyassert(c, &@1, $3.imm.value == 1,
|
|
"LOAD of arrays not supported!");
|
|
gen_load(c, &@1, &$5, $7, &$9, &$11);
|
|
}
|
|
| STORE '(' IMM ',' IMM ',' var ',' rvalue ')'
|
|
/* Store primitive */
|
|
{
|
|
@1.last_column = @10.last_column;
|
|
yyassert(c, &@1, !is_inside_ternary(c),
|
|
"Assignment side-effect not modeled!");
|
|
yyassert(c, &@1, $3.imm.value == 1,
|
|
"STORE of arrays not supported!");
|
|
gen_store(c, &@1, &$5, &$7, &$9);
|
|
}
|
|
| LPCFG '=' rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
yyassert(c, &@1, !is_inside_ternary(c),
|
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"Assignment side-effect not modeled!");
|
|
$3 = gen_rvalue_truncate(c, &@1, &$3);
|
|
$3 = rvalue_materialize(c, &@1, &$3);
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OUT(c, &@1, "SET_USR_FIELD(USR_LPCFG, ", &$3, ");\n");
|
|
}
|
|
| DEPOSIT '(' rvalue ',' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @8.last_column;
|
|
yyassert(c, &@1, !is_inside_ternary(c),
|
|
"Assignment side-effect not modeled!");
|
|
gen_deposit_op(c, &@1, &$5, &$7, &$3, &$1);
|
|
}
|
|
| SETHALF '(' rvalue ',' lvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @8.last_column;
|
|
yyassert(c, &@1, !is_inside_ternary(c),
|
|
"Assignment side-effect not modeled!");
|
|
gen_sethalf(c, &@1, &$1, &$3, &$5, &$7);
|
|
}
|
|
| SETBITS '(' rvalue ',' rvalue ',' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @10.last_column;
|
|
yyassert(c, &@1, !is_inside_ternary(c),
|
|
"Assignment side-effect not modeled!");
|
|
gen_setbits(c, &@1, &$3, &$5, &$7, &$9);
|
|
}
|
|
| INSBITS '(' lvalue ',' rvalue ',' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @10.last_column;
|
|
yyassert(c, &@1, !is_inside_ternary(c),
|
|
"Assignment side-effect not modeled!");
|
|
gen_rdeposit_op(c, &@1, &$3, &$9, &$7, &$5);
|
|
}
|
|
| IDENTITY '(' rvalue ')'
|
|
{
|
|
@1.last_column = @4.last_column;
|
|
$$ = $3;
|
|
}
|
|
;
|
|
|
|
control_statement : frame_check
|
|
| cancel_statement
|
|
| if_statement
|
|
| for_statement
|
|
;
|
|
|
|
frame_check : FCHK '(' rvalue ',' rvalue ')' ';'
|
|
;
|
|
|
|
cancel_statement : LOAD_CANCEL
|
|
{
|
|
gen_load_cancel(c, &@1);
|
|
}
|
|
| STORE_CANCEL
|
|
{
|
|
gen_cancel(c, &@1);
|
|
}
|
|
| CANCEL
|
|
;
|
|
|
|
if_statement : if_stmt
|
|
{
|
|
/* Fix else label */
|
|
OUT(c, &@1, "gen_set_label(if_label_", &$1, ");\n");
|
|
}
|
|
| if_stmt ELSE
|
|
{
|
|
@1.last_column = @2.last_column;
|
|
$2 = gen_if_else(c, &@1, $1);
|
|
}
|
|
statement
|
|
{
|
|
OUT(c, &@1, "gen_set_label(if_label_", &$2, ");\n");
|
|
}
|
|
;
|
|
|
|
for_statement : FOR '(' IMM '=' IMM ';' IMM '<' IMM ';' IMM PLUSPLUS ')'
|
|
{
|
|
yyassert(c, &@3,
|
|
$3.imm.type == I &&
|
|
$7.imm.type == I &&
|
|
$11.imm.type == I,
|
|
"Loop induction variable must be \"i\"");
|
|
@1.last_column = @13.last_column;
|
|
OUT(c, &@1, "for (int ", &$3, " = ", &$5, "; ",
|
|
&$7, " < ", &$9);
|
|
OUT(c, &@1, "; ", &$11, "++) {\n");
|
|
}
|
|
code_block
|
|
{
|
|
OUT(c, &@1, "}\n");
|
|
}
|
|
;
|
|
|
|
if_stmt : IF '(' rvalue ')'
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$1 = gen_if_cond(c, &@1, &$3);
|
|
}
|
|
statement
|
|
{
|
|
$$ = $1;
|
|
}
|
|
;
|
|
|
|
rvalue : FAIL
|
|
{
|
|
yyassert(c, &@1, false, "Encountered a FAIL token as rvalue.\n");
|
|
}
|
|
| assign_statement
|
|
| REG
|
|
{
|
|
$$ = $1;
|
|
}
|
|
| IMM
|
|
{
|
|
$$ = $1;
|
|
}
|
|
| PRED
|
|
{
|
|
$$ = gen_rvalue_pred(c, &@1, &$1);
|
|
}
|
|
| PC
|
|
{
|
|
/* Read PC from the CR */
|
|
HexValue rvalue;
|
|
memset(&rvalue, 0, sizeof(HexValue));
|
|
rvalue.type = IMMEDIATE;
|
|
rvalue.imm.type = IMM_PC;
|
|
rvalue.bit_width = 32;
|
|
rvalue.signedness = UNSIGNED;
|
|
$$ = rvalue;
|
|
}
|
|
| CONSTEXT
|
|
{
|
|
HexValue rvalue;
|
|
memset(&rvalue, 0, sizeof(HexValue));
|
|
rvalue.type = IMMEDIATE;
|
|
rvalue.imm.type = IMM_CONSTEXT;
|
|
rvalue.signedness = UNSIGNED;
|
|
rvalue.is_dotnew = false;
|
|
$$ = rvalue;
|
|
}
|
|
| var
|
|
{
|
|
$$ = gen_rvalue_var(c, &@1, &$1);
|
|
}
|
|
| MPY '(' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @6.last_column;
|
|
$$ = gen_rvalue_mpy(c, &@1, &$1, &$3, &$5);
|
|
}
|
|
| rvalue '+' rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_op(c, &@1, ADD_OP, &$1, &$3);
|
|
}
|
|
| rvalue '-' rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_op(c, &@1, SUB_OP, &$1, &$3);
|
|
}
|
|
| rvalue '*' rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_op(c, &@1, MUL_OP, &$1, &$3);
|
|
}
|
|
| rvalue ASL rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_op(c, &@1, ASL_OP, &$1, &$3);
|
|
}
|
|
| rvalue ASR rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
assert_signedness(c, &@1, $1.signedness);
|
|
if ($1.signedness == UNSIGNED) {
|
|
$$ = gen_bin_op(c, &@1, LSR_OP, &$1, &$3);
|
|
} else if ($1.signedness == SIGNED) {
|
|
$$ = gen_bin_op(c, &@1, ASR_OP, &$1, &$3);
|
|
}
|
|
}
|
|
| rvalue LSR rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_op(c, &@1, LSR_OP, &$1, &$3);
|
|
}
|
|
| rvalue '&' rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_op(c, &@1, ANDB_OP, &$1, &$3);
|
|
}
|
|
| rvalue '|' rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_op(c, &@1, ORB_OP, &$1, &$3);
|
|
}
|
|
| rvalue '^' rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_op(c, &@1, XORB_OP, &$1, &$3);
|
|
}
|
|
| rvalue ANDL rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_op(c, &@1, ANDL_OP, &$1, &$3);
|
|
}
|
|
| MIN '(' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_op(c, &@1, MINI_OP, &$3, &$5);
|
|
}
|
|
| MAX '(' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_op(c, &@1, MAXI_OP, &$3, &$5);
|
|
}
|
|
| '~' rvalue
|
|
{
|
|
@1.last_column = @2.last_column;
|
|
$$ = gen_rvalue_not(c, &@1, &$2);
|
|
}
|
|
| '!' rvalue
|
|
{
|
|
@1.last_column = @2.last_column;
|
|
$$ = gen_rvalue_notl(c, &@1, &$2);
|
|
}
|
|
| SAT '(' IMM ',' rvalue ')'
|
|
{
|
|
@1.last_column = @6.last_column;
|
|
$$ = gen_rvalue_sat(c, &@1, &$1, &$3, &$5);
|
|
}
|
|
| CAST rvalue
|
|
{
|
|
@1.last_column = @2.last_column;
|
|
/* Assign target signedness */
|
|
$2.signedness = $1.signedness;
|
|
$$ = gen_cast_op(c, &@1, &$2, $1.bit_width, $1.signedness);
|
|
}
|
|
| rvalue EQ rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_cmp(c, &@1, TCG_COND_EQ, &$1, &$3);
|
|
}
|
|
| rvalue NEQ rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
$$ = gen_bin_cmp(c, &@1, TCG_COND_NE, &$1, &$3);
|
|
}
|
|
| rvalue '<' rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
|
|
assert_signedness(c, &@1, $1.signedness);
|
|
assert_signedness(c, &@1, $3.signedness);
|
|
if ($1.signedness == UNSIGNED || $3.signedness == UNSIGNED) {
|
|
$$ = gen_bin_cmp(c, &@1, TCG_COND_LTU, &$1, &$3);
|
|
} else {
|
|
$$ = gen_bin_cmp(c, &@1, TCG_COND_LT, &$1, &$3);
|
|
}
|
|
}
|
|
| rvalue '>' rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
|
|
assert_signedness(c, &@1, $1.signedness);
|
|
assert_signedness(c, &@1, $3.signedness);
|
|
if ($1.signedness == UNSIGNED || $3.signedness == UNSIGNED) {
|
|
$$ = gen_bin_cmp(c, &@1, TCG_COND_GTU, &$1, &$3);
|
|
} else {
|
|
$$ = gen_bin_cmp(c, &@1, TCG_COND_GT, &$1, &$3);
|
|
}
|
|
}
|
|
| rvalue LTE rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
|
|
assert_signedness(c, &@1, $1.signedness);
|
|
assert_signedness(c, &@1, $3.signedness);
|
|
if ($1.signedness == UNSIGNED || $3.signedness == UNSIGNED) {
|
|
$$ = gen_bin_cmp(c, &@1, TCG_COND_LEU, &$1, &$3);
|
|
} else {
|
|
$$ = gen_bin_cmp(c, &@1, TCG_COND_LE, &$1, &$3);
|
|
}
|
|
}
|
|
| rvalue GTE rvalue
|
|
{
|
|
@1.last_column = @3.last_column;
|
|
|
|
assert_signedness(c, &@1, $1.signedness);
|
|
assert_signedness(c, &@1, $3.signedness);
|
|
if ($1.signedness == UNSIGNED || $3.signedness == UNSIGNED) {
|
|
$$ = gen_bin_cmp(c, &@1, TCG_COND_GEU, &$1, &$3);
|
|
} else {
|
|
$$ = gen_bin_cmp(c, &@1, TCG_COND_GE, &$1, &$3);
|
|
}
|
|
}
|
|
| rvalue '?'
|
|
{
|
|
Ternary t = { 0 };
|
|
t.state = IN_LEFT;
|
|
t.cond = $1;
|
|
g_array_append_val(c->ternary, t);
|
|
}
|
|
rvalue ':'
|
|
{
|
|
Ternary *t = &g_array_index(c->ternary, Ternary,
|
|
c->ternary->len - 1);
|
|
t->state = IN_RIGHT;
|
|
}
|
|
rvalue
|
|
{
|
|
@1.last_column = @5.last_column;
|
|
$$ = gen_rvalue_ternary(c, &@1, &$1, &$4, &$7);
|
|
}
|
|
| FSCR '(' rvalue ')'
|
|
{
|
|
@1.last_column = @4.last_column;
|
|
$$ = gen_rvalue_fscr(c, &@1, &$3);
|
|
}
|
|
| SXT '(' rvalue ',' IMM ',' rvalue ')'
|
|
{
|
|
@1.last_column = @8.last_column;
|
|
yyassert(c, &@1, $5.type == IMMEDIATE &&
|
|
$5.imm.type == VALUE,
|
|
"SXT expects immediate values\n");
|
|
$$ = gen_extend_op(c, &@1, &$3, $5.imm.value, &$7, SIGNED);
|
|
}
|
|
| ZXT '(' rvalue ',' IMM ',' rvalue ')'
|
|
{
|
|
@1.last_column = @8.last_column;
|
|
yyassert(c, &@1, $5.type == IMMEDIATE &&
|
|
$5.imm.type == VALUE,
|
|
"ZXT expects immediate values\n");
|
|
$$ = gen_extend_op(c, &@1, &$3, $5.imm.value, &$7, UNSIGNED);
|
|
}
|
|
| '(' rvalue ')'
|
|
{
|
|
$$ = $2;
|
|
}
|
|
| ABS rvalue
|
|
{
|
|
@1.last_column = @2.last_column;
|
|
$$ = gen_rvalue_abs(c, &@1, &$2);
|
|
}
|
|
| CROUND '(' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @6.last_column;
|
|
$$ = gen_convround_n(c, &@1, &$3, &$5);
|
|
}
|
|
| CROUND '(' rvalue ')'
|
|
{
|
|
@1.last_column = @4.last_column;
|
|
$$ = gen_convround(c, &@1, &$3);
|
|
}
|
|
| ROUND '(' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @6.last_column;
|
|
$$ = gen_round(c, &@1, &$3, &$5);
|
|
}
|
|
| '-' rvalue
|
|
{
|
|
@1.last_column = @2.last_column;
|
|
$$ = gen_rvalue_neg(c, &@1, &$2);
|
|
}
|
|
| ICIRC '(' rvalue ')' ASL IMM
|
|
{
|
|
@1.last_column = @6.last_column;
|
|
$$ = gen_tmp(c, &@1, 32, UNSIGNED);
|
|
OUT(c, &@1, "gen_read_ireg(", &$$, ", ", &$3, ", ", &$6, ");\n");
|
|
}
|
|
| CIRCADD '(' rvalue ',' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @8.last_column;
|
|
gen_circ_op(c, &@1, &$3, &$5, &$7);
|
|
}
|
|
| LOCNT '(' rvalue ')'
|
|
{
|
|
@1.last_column = @4.last_column;
|
|
/* Leading ones count */
|
|
$$ = gen_locnt_op(c, &@1, &$3);
|
|
}
|
|
| COUNTONES '(' rvalue ')'
|
|
{
|
|
@1.last_column = @4.last_column;
|
|
/* Ones count */
|
|
$$ = gen_ctpop_op(c, &@1, &$3);
|
|
}
|
|
| EXTRACT '(' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @6.last_column;
|
|
$$ = gen_extract_op(c, &@1, &$5, &$3, &$1);
|
|
}
|
|
| EXTRANGE '(' rvalue ',' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @8.last_column;
|
|
yyassert(c, &@1, $5.type == IMMEDIATE &&
|
|
$5.imm.type == VALUE &&
|
|
$7.type == IMMEDIATE &&
|
|
$7.imm.type == VALUE,
|
|
"Range extract needs immediate values!\n");
|
|
$$ = gen_rextract_op(c,
|
|
&@1,
|
|
&$3,
|
|
$7.imm.value,
|
|
$5.imm.value - $7.imm.value + 1);
|
|
}
|
|
| CAST4_8U '(' rvalue ')'
|
|
{
|
|
@1.last_column = @4.last_column;
|
|
$$ = gen_rvalue_truncate(c, &@1, &$3);
|
|
$$.signedness = UNSIGNED;
|
|
$$ = rvalue_materialize(c, &@1, &$$);
|
|
$$ = gen_rvalue_extend(c, &@1, &$$);
|
|
}
|
|
| BREV '(' rvalue ')'
|
|
{
|
|
@1.last_column = @4.last_column;
|
|
$$ = gen_rvalue_brev(c, &@1, &$3);
|
|
}
|
|
| ROTL '(' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @6.last_column;
|
|
$$ = gen_rotl(c, &@1, &$3, &$5);
|
|
}
|
|
| ADDSAT64 '(' rvalue ',' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @8.last_column;
|
|
gen_addsat64(c, &@1, &$3, &$5, &$7);
|
|
}
|
|
| CARRY_FROM_ADD '(' rvalue ',' rvalue ',' rvalue ')'
|
|
{
|
|
@1.last_column = @8.last_column;
|
|
$$ = gen_carry_from_add(c, &@1, &$3, &$5, &$7);
|
|
}
|
|
| LSBNEW '(' rvalue ')'
|
|
{
|
|
@1.last_column = @4.last_column;
|
|
HexValue one = gen_imm_value(c, &@1, 1, 32, UNSIGNED);
|
|
$$ = gen_bin_op(c, &@1, ANDB_OP, &$3, &one);
|
|
}
|
|
;
|
|
|
|
lvalue : FAIL
|
|
{
|
|
@1.last_column = @1.last_column;
|
|
yyassert(c, &@1, false, "Encountered a FAIL token as lvalue.\n");
|
|
}
|
|
| REG
|
|
{
|
|
$$ = $1;
|
|
}
|
|
| var
|
|
{
|
|
$$ = $1;
|
|
}
|
|
;
|
|
|
|
%%
|
|
|
|
int main(int argc, char **argv)
|
|
{
|
|
if (argc != 5) {
|
|
fprintf(stderr,
|
|
"Semantics: Hexagon ISA to tinycode generator compiler\n\n");
|
|
fprintf(stderr,
|
|
"Usage: ./semantics IDEFS EMITTER_C EMITTER_H "
|
|
"ENABLED_INSTRUCTIONS_LIST\n");
|
|
return 1;
|
|
}
|
|
|
|
enum {
|
|
ARG_INDEX_ARGV0 = 0,
|
|
ARG_INDEX_IDEFS,
|
|
ARG_INDEX_EMITTER_C,
|
|
ARG_INDEX_EMITTER_H,
|
|
ARG_INDEX_ENABLED_INSTRUCTIONS_LIST
|
|
};
|
|
|
|
FILE *enabled_file = fopen(argv[ARG_INDEX_ENABLED_INSTRUCTIONS_LIST], "w");
|
|
|
|
FILE *output_file = fopen(argv[ARG_INDEX_EMITTER_C], "w");
|
|
fputs("#include \"qemu/osdep.h\"\n", output_file);
|
|
fputs("#include \"qemu/log.h\"\n", output_file);
|
|
fputs("#include \"cpu.h\"\n", output_file);
|
|
fputs("#include \"internal.h\"\n", output_file);
|
|
fputs("#include \"tcg/tcg-op.h\"\n", output_file);
|
|
fputs("#include \"insn.h\"\n", output_file);
|
|
fputs("#include \"opcodes.h\"\n", output_file);
|
|
fputs("#include \"translate.h\"\n", output_file);
|
|
fputs("#define QEMU_GENERATE\n", output_file);
|
|
fputs("#include \"genptr.h\"\n", output_file);
|
|
fputs("#include \"tcg/tcg.h\"\n", output_file);
|
|
fputs("#include \"macros.h\"\n", output_file);
|
|
fprintf(output_file, "#include \"%s\"\n", argv[ARG_INDEX_EMITTER_H]);
|
|
|
|
FILE *defines_file = fopen(argv[ARG_INDEX_EMITTER_H], "w");
|
|
assert(defines_file != NULL);
|
|
fputs("#ifndef HEX_EMITTER_H\n", defines_file);
|
|
fputs("#define HEX_EMITTER_H\n", defines_file);
|
|
fputs("\n", defines_file);
|
|
fputs("#include \"insn.h\"\n\n", defines_file);
|
|
|
|
/* Parser input file */
|
|
Context context = { 0 };
|
|
context.defines_file = defines_file;
|
|
context.output_file = output_file;
|
|
context.enabled_file = enabled_file;
|
|
/* Initialize buffers */
|
|
context.out_str = g_string_new(NULL);
|
|
context.signature_str = g_string_new(NULL);
|
|
context.header_str = g_string_new(NULL);
|
|
context.ternary = g_array_new(FALSE, TRUE, sizeof(Ternary));
|
|
/* Read input file */
|
|
FILE *input_file = fopen(argv[ARG_INDEX_IDEFS], "r");
|
|
fseek(input_file, 0L, SEEK_END);
|
|
long input_size = ftell(input_file);
|
|
context.input_buffer = (char *) calloc(input_size + 1, sizeof(char));
|
|
fseek(input_file, 0L, SEEK_SET);
|
|
size_t read_chars = fread(context.input_buffer,
|
|
sizeof(char),
|
|
input_size,
|
|
input_file);
|
|
if (read_chars != (size_t) input_size) {
|
|
fprintf(stderr, "Error: an error occurred while reading input file!\n");
|
|
return -1;
|
|
}
|
|
yylex_init(&context.scanner);
|
|
YY_BUFFER_STATE buffer;
|
|
buffer = yy_scan_string(context.input_buffer, context.scanner);
|
|
/* Start the parsing procedure */
|
|
yyparse(context.scanner, &context);
|
|
if (context.implemented_insn != context.total_insn) {
|
|
fprintf(stderr,
|
|
"Warning: %d/%d meta instructions have been implemented!\n",
|
|
context.implemented_insn,
|
|
context.total_insn);
|
|
}
|
|
fputs("#endif " START_COMMENT " HEX_EMITTER_h " END_COMMENT "\n",
|
|
defines_file);
|
|
/* Cleanup */
|
|
yy_delete_buffer(buffer, context.scanner);
|
|
yylex_destroy(context.scanner);
|
|
free(context.input_buffer);
|
|
g_string_free(context.out_str, TRUE);
|
|
g_string_free(context.signature_str, TRUE);
|
|
g_string_free(context.header_str, TRUE);
|
|
g_array_free(context.ternary, TRUE);
|
|
fclose(output_file);
|
|
fclose(input_file);
|
|
fclose(defines_file);
|
|
fclose(enabled_file);
|
|
|
|
return 0;
|
|
}
|