edf5ca5dbe
PCIDeviceClass and PCIDevice are defined in pci.h. Many users of the header don't actually need them. Similar structs live in their own headers: PCIBusClass and PCIBus in pci_bus.h, PCIBridge in pci_bridge.h, PCIHostBridgeClass and PCIHostState in pci_host.h, PCIExpressHost in pcie_host.h, and PCIERootPortClass, PCIEPort, and PCIESlot in pcie_port.h. Move PCIDeviceClass and PCIDeviceClass to new pci_device.h, along with the code that needs them. Adjust include directives. This also enables the next commit. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20221222100330.380143-6-armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
54 lines
1.2 KiB
C
54 lines
1.2 KiB
C
#ifndef HW_PCI_HOST_SABRE_H
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#define HW_PCI_HOST_SABRE_H
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#include "hw/pci/pci_device.h"
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#include "hw/pci/pci_host.h"
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#include "hw/sparc/sun4u_iommu.h"
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#include "qom/object.h"
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#define MAX_IVEC 0x40
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/* OBIO IVEC IRQs */
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#define OBIO_HDD_IRQ 0x20
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#define OBIO_NIC_IRQ 0x21
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#define OBIO_LPT_IRQ 0x22
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#define OBIO_FDD_IRQ 0x27
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#define OBIO_KBD_IRQ 0x29
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#define OBIO_MSE_IRQ 0x2a
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#define OBIO_SER_IRQ 0x2b
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struct SabrePCIState {
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PCIDevice parent_obj;
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};
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#define TYPE_SABRE_PCI_DEVICE "sabre-pci"
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OBJECT_DECLARE_SIMPLE_TYPE(SabrePCIState, SABRE_PCI_DEVICE)
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struct SabreState {
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PCIHostState parent_obj;
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hwaddr special_base;
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hwaddr mem_base;
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MemoryRegion sabre_config;
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MemoryRegion pci_config;
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MemoryRegion pci_mmio;
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MemoryRegion pci_ioport;
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uint64_t pci_irq_in;
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IOMMUState *iommu;
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PCIBridge *bridgeA;
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PCIBridge *bridgeB;
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uint32_t pci_control[16];
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uint32_t pci_irq_map[8];
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uint32_t pci_err_irq_map[4];
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uint32_t obio_irq_map[32];
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qemu_irq ivec_irqs[MAX_IVEC];
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unsigned int irq_request;
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uint32_t reset_control;
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unsigned int nr_resets;
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};
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#define TYPE_SABRE "sabre"
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OBJECT_DECLARE_SIMPLE_TYPE(SabreState, SABRE)
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#endif
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