qemu/target-mips
Jia Liu 77c5fa8b55 target-mips: Add ASE DSP GPR-based shift instructions
Add MIPS ASE DSP GPR-Based Shift instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:37:17 +01:00
..
cpu-qom.h target-mips: QOM'ify CPU 2012-04-30 11:32:13 +02:00
cpu.c target-mips: Start QOM'ifying CPU init 2012-04-30 11:32:13 +02:00
cpu.h target-mips: Add ASE DSP resources access check 2012-10-31 20:24:06 +01:00
dsp_helper.c target-mips: Add ASE DSP GPR-based shift instructions 2012-10-31 21:37:17 +01:00
helper.c target-mips: Add ASE DSP resources access check 2012-10-31 20:24:06 +01:00
helper.h target-mips: Add ASE DSP GPR-based shift instructions 2012-10-31 21:37:17 +01:00
lmi_helper.c target-mips: Implement Loongson Multimedia Instructions 2012-09-19 21:40:48 +02:00
machine.c target-mips: Don't overuse CPUState 2012-03-14 22:20:25 +01:00
Makefile.objs target-mips: Add ASE DSP internal functions 2012-10-31 20:24:05 +01:00
mips-defs.h MIPS: Initial support of fulong mini pc (CPU definition) 2010-06-29 23:07:52 +02:00
op_helper.c Rename target_phys_addr_t to hwaddr 2012-10-23 08:58:25 -05:00
TODO Replace Qemu by QEMU in internal documentation 2012-04-07 13:58:25 +00:00
translate_init.c mips: Default to using one VPE and one TC. 2011-09-06 11:09:39 +02:00
translate.c target-mips: Add ASE DSP GPR-based shift instructions 2012-10-31 21:37:17 +01:00