774204cf98
This commit adds support for x2APIC transitions when writing to MSR_IA32_APICBASE register and finally adds CPUID_EXT_X2APIC to TCG_EXT_FEATURES. The set_base in APICCommonClass now returns an integer to indicate error in execution. apic_set_base return -1 on invalid APIC state transition, accelerator can use this to raise appropriate exception. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-4-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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apic_internal.h | ||
apic-msidef.h | ||
apic.h | ||
hostmem-epc.h | ||
intel_iommu.h | ||
microvm.h | ||
pc.h | ||
sgx-epc.h | ||
topology.h | ||
vmport.h | ||
x86-iommu.h | ||
x86.h | ||
xen_arch_hvm.h |