qemu/target/arm
Peter Maydell 73cc9ee6bf target/arm: Use aarch64_cpu_register() for 'host' CPU type
Use the aarch64_cpu_register() machinery to register the 'host' CPU
type.  This doesn't gain us anything functionally, but it does mean
that the code for initializing it looks more like that for the other
CPU types, in that its initfn then doesn't need to call
arm_cpu_post_init() (because aarch64_cpu_instance_init() does that
for it).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220204165506.2846058-3-peter.maydell@linaro.org
2022-02-21 13:30:20 +00:00
..
hvf hvf: arm: Handle unknown ID registers as RES0 2022-02-21 13:30:19 +00:00
a32-uncond.decode
a32.decode
arch_dump.c
arm_ldst.h accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
arm-powerctl.c
arm-powerctl.h
cpu64.c target/arm: Use aarch64_cpu_register() for 'host' CPU type 2022-02-21 13:30:20 +00:00
cpu_tcg.c target/arm: Implement arm_cpu_record_sigbus 2021-11-02 07:00:52 -04:00
cpu-param.h
cpu-qom.h
cpu.c target/arm: Move '-cpu host' code to cpu64.c 2022-02-21 13:30:20 +00:00
cpu.h hw/arm/virt: KVM: Enable PAuth when supported by the host 2022-01-20 11:47:52 +00:00
crypto_helper.c
debug_helper.c target/arm: Suppress bp for exceptions with more priority 2021-12-15 10:35:26 +00:00
gdbstub64.c target/arm: Move gdbstub related code out of helper.c 2021-09-30 13:42:10 +01:00
gdbstub.c target/arm: Assert thumb pc is aligned 2021-12-15 10:35:26 +00:00
helper-a64.c arm: force flag recalculation when messing with DAIF 2022-02-08 10:56:28 +00:00
helper-a64.h
helper-mve.h target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
helper-sve.h
helper.c target/arm: Use CPTR_TFP with CPTR_EL3 in fp_exception_el 2022-02-08 10:56:27 +00:00
helper.h target/arm: Take an exception if PC is misaligned 2021-12-15 10:35:26 +00:00
hvf_arm.h hvf: arm: Implement -cpu host 2021-09-21 16:28:26 +01:00
idau.h
internals.h target/arm: Log CPU index in 'Taking exception' log 2022-01-28 14:29:47 +00:00
iwmmxt_helper.c
Kconfig
kvm64.c hw/arm/virt: KVM: Enable PAuth when supported by the host 2022-01-20 11:47:52 +00:00
kvm_arm.h hvf: arm: Implement -cpu host 2021-09-21 16:28:26 +01:00
kvm-consts.h
kvm-stub.c
kvm.c memory: Name all the memory listeners 2021-09-30 15:30:24 +02:00
m_helper.c target/arm: Log CPU index in 'Taking exception' log 2022-01-28 14:29:47 +00:00
m-nocp.decode
machine.c target/arm: Assert thumb pc is aligned 2021-12-15 10:35:26 +00:00
meson.build arm: Add Hypervisor.framework build target 2021-09-21 16:28:26 +01:00
monitor.c
mte_helper.c target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup 2021-11-02 07:00:52 -04:00
mve_helper.c target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
mve.decode target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
neon_helper.c
neon-dp.decode
neon-ls.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
neon-shared.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
op_addsub.h
op_helper.c target/arm: Implement HSTR.TJDBX 2021-08-26 17:02:01 +01:00
pauth_helper.c
psci.c arm: tcg: Adhere to SMCCC 1.3 section 5.2 2022-02-08 10:56:28 +00:00
sve_helper.c target/arm: Fixup comment re handle_cpu_signal 2021-11-02 07:00:52 -04:00
sve.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
syndrome.h target/arm: Take an exception if PC is misaligned 2021-12-15 10:35:26 +00:00
t16.decode
t32.decode target/arm: Implement MVE VCTP 2021-08-25 10:48:50 +01:00
tlb_helper.c target/arm: Take an exception if PC is misaligned 2021-12-15 10:35:26 +00:00
trace-events
trace.h
translate-a32.h exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
translate-a64.c exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
translate-a64.h
translate-m-nocp.c target/arm: Add TB flag for "MVE insns not predicated" 2021-09-21 16:28:27 +01:00
translate-mve.c target/arm: Optimize MVE 1op-immediate insns 2021-09-21 16:28:27 +01:00
translate-neon.c exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
translate-sve.c exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
translate-vfp.c exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
translate.c exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
translate.h target/arm: Add TB flag for "MVE insns not predicated" 2021-09-21 16:28:27 +01:00
vec_helper.c target/arm: Implement MVE VMULL (polynomial) 2021-08-25 10:48:49 +01:00
vec_internal.h target/arm: Implement MVE VMULL (polynomial) 2021-08-25 10:48:49 +01:00
vfp_helper.c
vfp-uncond.decode
vfp.decode