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hvf: arm: Handle unknown ID registers as RES0

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Recent Linux versions added support to read ID_AA64ISAR2_EL1. On M1,
those reads trap into QEMU which handles them as faults.

However, AArch64 ID registers should always read as RES0. Let's
handle them accordingly.

This fixes booting Linux 5.17 guests.

Cc: qemu-stable@nongnu.org
Reported-by: Ivan Babrou <ivan@cloudflare.com>
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Message-id: 20220209124135.69183-2-agraf@csgraf.de
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Alexander Graf 2022-02-09 13:41:35 +01:00 committed by Peter Maydell
parent ad99f64f1c
commit 7f6c295cdf
1 changed files with 14 additions and 0 deletions
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14
target/arm/hvf/hvf.c
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@ -754,6 +754,15 @@ static bool hvf_handle_psci_call(CPUState *cpu)
return true;
}
static bool is_id_sysreg(uint32_t reg)
{
return SYSREG_OP0(reg) == 3 &&
SYSREG_OP1(reg) == 0 &&
SYSREG_CRN(reg) == 0 &&
SYSREG_CRM(reg) >= 1 &&
SYSREG_CRM(reg) < 8;
}
static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint32_t rt)
{
ARMCPU *arm_cpu = ARM_CPU(cpu);
@ -806,6 +815,11 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint32_t rt)
/* Dummy register */
break;
default:
if (is_id_sysreg(reg)) {
/* ID system registers read as RES0 */
val = 0;
break;
}
cpu_synchronize_state(cpu);
trace_hvf_unhandled_sysreg_read(env->pc, reg,
SYSREG_OP0(reg),